Abstract: A decoding process for a MPEG1 audio subband uses the symmetry of filter coefficients to reduce the number of multiplications required to decode an audio subband. The decoding process can be efficiently implemented on a single-instruction-multiple-data (SIMD) processor having vector registers capable of holding multiple samples from the subband. In a particular embodiment, some of samples are stored in a first vector register in a normal order and other samples are stored in a second vector register in a reverse order. For example, for eight data element vector registers, the first vector register contains a series of samples index values 0 to 7, and the second vector register contains a series of samples index values 31 to 24. Such ordering facilitates SIMD instructions which perform parallel operations combining value of index i with values of index 31-i.

Abstract: A method is provided for recovery of lost cells in a telecommunications infrastructure such as an ATM network wherein an error recovery scheme is incorporated into the network infrastructure to allow recovery of cells along the network.

Abstract: A method is provided for recovery of lost cells in an ATM network wherein an error recovery scheme is incorporated into the ATM adaptation layer to allow recovery of cells along the network.

Abstract: An audio decoder in a multimedia processor improves decoding efficiency and performance through the usage of multiple parallel processors including a scalar processor and a vector processor. The scalar processor most efficiently performs tasks including bit manipulation, indexing and conditional operations. The vector processor most efficiently performs operations involving multiple data calculations, operating on unconditional, sequential data. Improved performance is achieved by executing as many operations as possible on the vector processor, rather than the scalar processor, so long as the data is sequential data. The audio decoder includes a requantization program code that shifts data handling operations from the scalar processor to the vector processor through the conversion of nonsequential data to sequential data, thereby "vectorizing" the data.