Patents by Inventor Kierthi Swaminathan

Kierthi Swaminathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8940620
    Abstract: A composite wafer includes a first substrate having a first vertical thickness and a top surface, the top surface being prepared in a state for subsequent semiconductor material epitaxial deposition. A carrier substrate is disposed beneath the first substrate. The carrier substrate has a second vertical thickness greater than the first vertical thickness. An interlayer bonds the first substrate to the carrier substrate.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: January 27, 2015
    Assignee: Power Integrations, Inc.
    Inventors: Alexei Koudymov, Jamal Ramdani, Kierthi Swaminathan
  • Publication number: 20130157440
    Abstract: A composite wafer includes a first substrate having a first vertical thickness and a top surface, the top surface being prepared in a state for subsequent semiconductor material epitaxial deposition. A carrier substrate is disposed beneath the first substrate. The carrier substrate has a second vertical thickness greater than the first vertical thickness. An interlayer bonds the first substrate to the carrier substrate.
    Type: Application
    Filed: December 15, 2011
    Publication date: June 20, 2013
    Applicant: Power Integrations, Inc.
    Inventors: Alexei Koudymov, Jamal Ramdani, Kierthi Swaminathan