Abstract: In semiconductor devices and methods of manufacture, a semiconductor device comprises a substrate of semiconductor material extending in a horizontal direction. A plurality of interlayer dielectric layers are on the substrate. A plurality of gate patterns are provided, each gate pattern between a neighboring lower interlayer dielectric layer and a neighboring upper interlayer dielectric layer. A vertical channel of semiconductor material is on the substrate and extending in a vertical direction through the plurality of interlayer dielectric layers and the plurality of gate patterns. The vertical channel has an outer sidewall, the outer sidewall having a plurality of channel recesses, each channel recess corresponding to a gate pattern of the plurality of gate patterns. The vertical channel has an inner sidewall. An information storage layer is present in the recess between each gate pattern and the vertical channel that insulates the gate pattern from the vertical channel.

Abstract: In semiconductor devices and methods of manufacture, a semiconductor device comprises a substrate of semiconductor material extending in a horizontal direction. A plurality of interlayer dielectric layers are on the substrate. A plurality of gate patterns are provided, each gate pattern between a neighboring lower interlayer dielectric layer and a neighboring upper interlayer dielectric layer. A vertical channel of semiconductor material is on the substrate and extending in a vertical direction through the plurality of interlayer dielectric layers and the plurality of gate patterns. The vertical channel has an outer sidewall, the outer sidewall having a plurality of channel recesses, each channel recess corresponding to a gate pattern of the plurality of gate patterns. The vertical channel has an inner sidewall. An information storage layer is present in the recess between each gate pattern and the vertical channel that insulates the gate pattern from the vertical channel.