Patents by Inventor Kihyun YUN

Kihyun YUN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9373628
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The method may include forming an electrode structure including insulating layers and electrode layers alternatingly stacked on a substrate, forming a channel hole to penetrate the electrode structure, forming a data storage layer on a sidewall of the channel hole, and forming a semiconductor pattern on a sidewall of the data storage layer to be electrically connected to the substrate. The electrode layers may be metal-silicide layers, and the insulating layers and the electrode layers may be formed in an in-situ manner using the same deposition system.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: June 21, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woonghee Sohn, Kihyun Yun, Myoungbum Lee, Jeonggil Lee, Tai-Soo Lim, Yong Chae Jung
  • Publication number: 20140332874
    Abstract: A semiconductor device includes a substrate, a first poly-silicon pattern on the substrate, a metal pattern on the first poly-silicon pattern, and an interface layer between the first poly-silicon pattern and the metal pattern. The interface layer may include at least one selected from the group of a metal-silicon oxynitride layer, a metal-silicon oxide layer, and a metal-silicon nitride layer.
    Type: Application
    Filed: July 23, 2014
    Publication date: November 13, 2014
    Inventors: Jeonggil LEE, Tai-Soo LIM, HyunSeok LIM, Kihyun YUN, Hauk HAN, Myoungbum LEE
  • Publication number: 20140220750
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The method may include forming an electrode structure including insulating layers and electrode layers alternatingly stacked on a substrate, forming a channel hole to penetrate the electrode structure, forming a data storage layer on a sidewall of the channel hole, and forming a semiconductor pattern on a sidewall of the data storage layer to be electrically connected to the substrate. The electrode layers may be metal-silicide layers, and the insulating layers and the electrode layers may be formed in an in-situ manner using the same deposition system.
    Type: Application
    Filed: February 3, 2014
    Publication date: August 7, 2014
    Inventors: Woonghee Sohn, Kihyun Yun, Myoungbum Lee, Jeonggil Lee, Tai-Soo Lim, Yong Chae Jung
  • Publication number: 20140001625
    Abstract: A semiconductor device may include a contact mold layer on a substrate, the contact mold layer defining first and second contact portions on the substrate, a wire mold layer on the contact mold layer, and first and second wires penetrating the wire mold layer and extending in a first direction, the first and second wires contacting the respective first and second contact portions and the contact mold layer. The first and second wires may be arranged in an alternating manner, and the first and second contact portions may be arranged to have a zigzag configuration. Each of the first and second contact portions may include a conductive pattern and a barrier pattern, and the barrier pattern may have a top surface lower than a top surface of the contact mold layer.
    Type: Application
    Filed: July 2, 2013
    Publication date: January 2, 2014
    Inventors: HAUK HAN, Ho-Ki LEE, HyunSeok LIM, Kihyun YUN, MYOUNGBUM LEE, Jeonggil LEE, Tai-Soo LIM
  • Publication number: 20130273727
    Abstract: A semiconductor device includes a substrate, a first poly-silicon pattern on the substrate, a metal pattern on the first poly-silicon pattern, and an interface layer between the first poly-silicon pattern and the metal pattern. The interface layer may include at least one selected from the group of a metal-silicon oxynitride layer, a metal-silicon oxide layer, and a metal-silicon nitride layer.
    Type: Application
    Filed: March 4, 2013
    Publication date: October 17, 2013
    Inventors: Jeonggil LEE, Tai-Soo LIM, HyunSeok LIM, Kihyun YUN, Hauk HAN, Myoungbum LEE
  • Publication number: 20130228843
    Abstract: A nonvolatile memory device includes a memory gate pattern on a substrate, and a non-memory gate pattern on the substrate, the non-memory gate pattern being spaced apart from the memory gate pattern, wherein the non-memory gate pattern includes an ohmic layer, and the memory gate pattern is provided without an ohmic layer.
    Type: Application
    Filed: February 7, 2013
    Publication date: September 5, 2013
    Inventors: Tai-Soo LIM, Kihyun YUN, Jeonggil LEE, HyunSeok LIM, HAUK HAN, MYOUNGBUM LEE