Patents by Inventor Kiichi Hirano
Kiichi Hirano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10795253Abstract: A projection apparatus including a light source section, a projection section that projects light outputted from the light source section, and a control section that acquires captured image data produced by an imaging section, identifies a region of a projection target contained in the acquired captured image data and an image captured position of the region in the captured image data, determines a projection range over which the projection section projects light and a wavelength band of the light to be projected over the projection range based on the identified region and image captured position, and controls the projection section to cause the projection section to project light in the determined wavelength band over the determined projection range.Type: GrantFiled: January 22, 2019Date of Patent: October 6, 2020Assignee: SEIKO EPSON CORPORATIONInventors: Kazuhiro Miyoshi, Kiichi Hirano
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Publication number: 20190227423Abstract: A projection apparatus including a light source section, a projection section that projects light outputted from the light source section, and a control section that acquires captured image data produced by an imaging section, identifies a region of a projection target contained in the acquired captured image data and an image captured position of the region in the captured image data, determines a projection range over which the projection section projects light and a wavelength band of the light to be projected over the projection range based on the identified region and image captured position, and controls the projection section to cause the projection section to project light in the determined wavelength band over the determined projection range.Type: ApplicationFiled: January 22, 2019Publication date: July 25, 2019Applicant: SEIKO EPSON CORPORATIONInventors: Kazuhiro MIYOSHI, Kiichi HIRANO
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Patent number: 9898868Abstract: A head mounted display device includes an image display portion that transmits external scenery and displays an image so as to be capable of being visually recognized together with the external scenery. In addition, the head mounted display device includes a control unit that acquires an external scenery image including the external scenery which is visually recognized through the image display portion, recognizes an object which is visually recognized through the image display portion on the basis of the acquired external scenery image, and displays information regarding the object on the image display portion.Type: GrantFiled: October 15, 2015Date of Patent: February 20, 2018Assignee: SEIKO EPSON CORPORATIONInventors: Masashi Aonuma, Masahide Takano, Kiichi Hirano
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Publication number: 20160133051Abstract: A head mounted display device includes an image display portion that transmits external scenery and displays an image so as to be capable of being visually recognized together with the external scenery. In addition, the head mounted display device includes a control unit that acquires an external scenery image including the external scenery which is visually recognized through the image display portion, recognizes an object which is visually recognized through the image display portion on the basis of the acquired external scenery image, and displays information regarding the object on the image display portion.Type: ApplicationFiled: October 15, 2015Publication date: May 12, 2016Inventors: Masashi AONUMA, Masahide TAKANO, Kiichi HIRANO
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Patent number: 7364713Abstract: It is an object of the present invention to provide a raw material powder for stably obtaining a dense sinter that is prevented from cracking, and a method for manufacturing this powder, and a method for manufacturing a lanthanum-based oxide ion conductor in which this raw material powder is used. The raw material powder manufacturing method of the present invention is a method for manufacturing a raw material powder for forming an oxide ion conductor composed of a multi-component metal oxide including lanthanum or lanthanide, wherein a mixed powder blended such that all of the elements constituting said multi-component metal oxide are included is prefired, after which this prefired powder is exposed to water or moist gas so as to expand at least some of the particles in said powder. Alternatively, two types of mixed powder with different components are prefired separately, after which the prefired powders are blended in a specific ratio.Type: GrantFiled: February 10, 2003Date of Patent: April 29, 2008Assignees: Noritake Co., Limited, Chubu Electric Power Co., Inc., KCM CorporationInventors: Hisatomi Taguchi, Atsushi Fukaya, Shigeo Nagaya, Kiyoshi Komura, Kiichi Hirano, Hiroshi Tenjikukatsura
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Patent number: 7084052Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.Type: GrantFiled: August 13, 2004Date of Patent: August 1, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Kiichi Hirano, Naoya Sotani, Toshifumi Yamaji, Yoshihiro Morimoto, Kiyoshi Yoneda
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Publication number: 20050124484Abstract: It is an object of the present invention to provide a raw material powder for stably obtaining a dense sinter that is prevented from cracking, and a method for manufacturing this powder, and a method for manufacturing a lanthanum-based oxide ion conductor in which this raw material powder is used. The raw material powder manufacturing method of the present invention is a method for manufacturing a raw material powder for forming an oxide ion conductor composed of a multi-component metal oxide including lanthanum or lanthanide, wherein a mixed powder blended such that all of the elements constituting said multi-component metal oxide are included is prefired, after which this prefired powder is exposed to water or moist gas so as to expand at least some of the particles in said powder. Alternatively, two types of mixed powder with different components are prefired separately, after which the prefired powders are blended in a specific ratio.Type: ApplicationFiled: February 10, 2003Publication date: June 9, 2005Applicants: Noritake Co., Limited, Chubu Electronic Power Co., Inc., KCM CorporationInventors: Hisatomi Taguchi, Atsushi Fukaya, Shigeo Nagaya, Kiyoshi Komura, Kiichi Hirano, Hiroshi Tenjikukatsura
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Publication number: 20050014316Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.Type: ApplicationFiled: August 13, 2004Publication date: January 20, 2005Inventors: Kiichi Hirano, Naoya Sotani, Toshifumi Yamaji, Yoshihiro Morimoto, Kiyoshi Yoneda
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Patent number: 6790714Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.Type: GrantFiled: March 22, 2001Date of Patent: September 14, 2004Assignee: Sanyo Electric Co., Ltd.Inventors: Kiichi Hirano, Naoya Sotani, Toshifumi Yamaji, Yoshihiro Morimoto, Kiyoshi Yoneda
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Patent number: 6500704Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.Type: GrantFiled: April 8, 1998Date of Patent: December 31, 2002Assignee: Sanyo Electric Co., LtdInventors: Kiichi Hirano, Naoya Sotani, Toshifumi Yamaji, Yoshihiro Morimoto, Kiyoshi Yoneda
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Publication number: 20020102820Abstract: A method of fabricating a semiconductor device includes the steps of forming an amorphous semiconductor film on a substrate, oxidizing the surface of the amorphous semiconductor film in an atmosphere containing water vapor and oxygen, and removing an oxide film which is formed on the surface of the semiconductor film.Type: ApplicationFiled: October 15, 2001Publication date: August 1, 2002Inventors: Hiroki Hamada, Kiichi Hirano, Akifumi Sasaki
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Patent number: 6329269Abstract: A method of fabricating a semiconductor device includes the steps of forming an amorphous semiconductor film on a substrate, oxidizing the surface of the amorphous semiconductor film in an atmosphere containing water vapor and oxygen, and removing the oxide film which is formed on the surface of the semiconductor film.Type: GrantFiled: March 27, 1996Date of Patent: December 11, 2001Assignee: Sanyo Electric Co., Ltd.Inventors: Hiroki Hamada, Kiichi Hirano, Akifumi Sasaki
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Patent number: 6307324Abstract: In an active matrix system, a pixel of a display apparatus includes an electroluminescence (EL) element, a diode type driving element connected in series to the EL element for driving the EL element, an added capacitor and an added resistor. The added resistor is connected in series with the added capacitor, and the added resistor and the added capacitor are connected in parallel to the EL element. The added capacitor improves a writing characteristic and a holding characteristic of the pixel, such that a high quality image can be displayed.Type: GrantFiled: March 25, 1998Date of Patent: October 23, 2001Assignee: Sanyo Electric Co., Ltd.Inventors: Kiichi Hirano, Naoaki Komiya
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Publication number: 20010020702Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.Type: ApplicationFiled: March 22, 2001Publication date: September 13, 2001Applicant: SANYO Electric Co., Ltd.Inventors: Kiichi Hirano, Naoya Sotani, Toshifumi Yamaji, Yoshihiro Morimoto, Kiyoshi Yoneda
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Patent number: 6288412Abstract: A method of manufacturing a polycrystalline silicon film having a particular field effect mobility is disclosed. A first polycrystalline silicon film is formed on a transparent insulation substrate. The surface of the silicon film is oxidized, and an amorphous silicon film is formed on the first polycrystalline silicon film and oxide layer. The amorphous silicon film is subjected to a solid phase growth process to be converted to a second polycrystalline silicon film. The field effect mobility of the second polycrystalline silicon film can be adjusted to a desired value by controlling the relative thicknesses of the first and second polycrystalline silicon films.Type: GrantFiled: November 19, 1997Date of Patent: September 11, 2001Assignee: Sanyo Electric Co., Ltd.Inventors: Hiroki Hamada, Kiichi Hirano, Nobuhiro Gouda, Hisashi Abe, Eiji Taguchi, Nobuhiko Oda, Yoshihiro Morimoto
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Patent number: 6084579Abstract: A pixel of an organic electroluminescence (EL) display apparatus includes an EL element and an added capacitor connected in parallel with the EL element. The added capacitor provides improved image quality. To further improve image quality, an added resistor may be connected in series with the EL element, and in parallel with the added capacitor. Alternatively, the added resistor may be connected in series with the added capacitor, and in parallel with the EL element. The pixel may be used in both a simple matrix display system or an active matrix display system.Type: GrantFiled: November 25, 1997Date of Patent: July 4, 2000Assignee: Sanyo Electric Co., Ltd.Inventor: Kiichi Hirano
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Patent number: 5837568Abstract: To provide a manufacturing method of thin film transistors (TFT) using poly-silicone and having an LDD structure. In particular, the LDD sections of the TFTs are formed in an improved method so as to achieve a high throughput and stable performance of the TFTs. To be specific, the LD region is doped at a low concentration in the ion implantation method which includes mass spectrometry because high controllability over a dose is required. On the other hand, the source and drain regions are doped at a higher concentration than the LD region in the ion showering method which does not include mass spectrometry. Using the ion showering method, poly-crystal silicon can be doped such that less doping damage is caused thereto. This makes it possible to apply a lower temperature for annealing, such as RTA, to activate doped impurities so as to prevent the substrate from being curved.Type: GrantFiled: December 10, 1996Date of Patent: November 17, 1998Assignee: Sanyo Electric Co., Ltd.Inventors: Kiyoshi Yoneda, Yoshihiro Morimoto, Kiichi Hirano, Koji Suzuki, Masaru Takeuchi
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Patent number: 5771110Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.Type: GrantFiled: July 2, 1996Date of Patent: June 23, 1998Assignee: Sanyo Electric Co., Ltd.Inventors: Kiichi Hirano, Naoya Sotani, Toshifumi Yamaji, Yoshihiro Morimoto, Kiyoshi Yoneda
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Patent number: 5707882Abstract: A method of manufacturing a polycrystalline silicon film having a particular field effect mobility is disclosed. A first polycrystalline silicon film is formed on a transparent insulation substrate. The surface of the silicon film is oxidized, and an amorphous silicon film is formed on the first polycrystalline silicon film and oxide layer. The amorphous silicon film is subjected to a solid phase growth process to be converted to a second polycrystalline silicon film. The field effect mobility of the second polycrystalline silicon film can be adjusted to a desired value by controlling the relative thicknesses of the first and second polycrystalline silicon films.Type: GrantFiled: January 23, 1995Date of Patent: January 13, 1998Assignee: Sanyo Electric Co., Ltd.Inventors: Hiroki Hamada, Kiichi Hirano, Nobuhiro Gouda, Hisashi Abe, Eiji Taguchi, Nobuhiko Oda, Yoshihiro Morimoto
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Patent number: 5227336Abstract: A tungsten film is formed in two steps in a tungsten chemical vapor deposition method of the present invention. In a first step, a first thin tungsten film is selectively grown on a surface of a silicon substrate by a silicon reduction using a WF.sub.6 gas as a tungsten source, followed by a second step in which another tungsten film is formed on the first tungsten film by a silane reduction using a WF.sub.6 gas as a tungsten source. The state of the silicon substrate surface is monitored by a pyrometer, and the timing of change from the silicon reduction to the silane reduction is determined on the basis of the intensity of the infrared ray radiation.Type: GrantFiled: December 27, 1991Date of Patent: July 13, 1993Assignee: Small Power Communication Systems Research Laboratories Co., Ltd.Inventors: Kiichi Hirano, Nobuo Takeda