Patents by Inventor Kiichiro Mukai
Kiichiro Mukai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6747339Abstract: A semiconductor device wherein a coating film which is made of a polyimide resin or a polyimide isoindoloquinazolinedione resin and which is at least 10 &mgr;m thick is disposed on at least an active region of a semiconductor substrate, and the resultant semiconductor substrate is encapsulated in a ceramic package. The semiconductor device has troubles relieved conspicuously, the troubles being ascribable to alpha-rays which come flying from impurities contained in the material of the package.Type: GrantFiled: December 22, 1994Date of Patent: June 8, 2004Assignee: Hitachi, Ltd.Inventors: Kiichiro Mukai, Atsushi Saiki, Seiki Harada
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Patent number: 6551765Abstract: A coating apparatus for forming a film on a surface of a substrate to be coated, comprises a holding table for holding the substrate to be coated, a discharge head, containing a coating solution and formed with a plurality of discharge holes at a portion thereof opposing the substrate to be coated, for discharging the coating solution, a fine-vibration plate for applying fine vibrations to discharge the coating solution and driving motor for driving the holding table and the discharge head relative to each other.Type: GrantFiled: January 4, 2000Date of Patent: April 22, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Kiichiro Mukai, Akira Sato, Katuyuki Soeda
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Patent number: 5643473Abstract: A dry etching method is disclosed, in which the pressure of etching gas in a reaction chamber, the bias voltage applied to article to be etched, and the temperature of the article to be etched object are set so that the etching rate for the article to be etched is greater than 0.2 .mu.m/min, a ratio of the length of side etching in the article to be etched to the depth of etching therein is less than 1/100, and a ratio of the etching rate for the article to be etched to the etching rate for a mask formed thereon is greater than 10. Thus, the dry etching method can satisfy three requirements (that is, a high etching rate, a high selection ratio and marked anisotropy in etching) at the same time, although conventional dry etching methods can satisfy only two of three requirements.Type: GrantFiled: May 30, 1995Date of Patent: July 1, 1997Assignee: Hitachi, Ltd.Inventors: Shinichi Tachi, Kazunori Tsujimoto, Sadayuki Okudaira, Kiichiro Mukai
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Patent number: 5391915Abstract: A semiconductor device wherein a coating film which is made of a polyimide resin or a polyimide isoindoloquinazolinedione resin and which is at least 10 .mu.m thick is disposed on at least an active region of a semiconductor substrate, and the resultant semiconductor substrate is encapsulated in a ceramic package. The semiconductor device has troubles relieved conspicuously, the troubles being ascribable to alpha-rays which come flying from impurities contained in the material of the package.Type: GrantFiled: December 13, 1993Date of Patent: February 21, 1995Assignee: Hatachi, Ltd.Inventors: Kiichiro Mukai, Atsushi Saiki, Seiki Harada
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Patent number: 5292673Abstract: When a MOSFET containing a tantalum pentoxide film as a gate insulating film is formed, ion implantation is applied such that the end of an insulating film containing a tantalum pentoxide film situates to the outside of a gate electrode to thereby form source and drain regions. This can effectively prevent troubles such as short-circuitting due to tantalum pentoxide film and a highly reliable MOSFET can be obtained without applying light oxidation.Type: GrantFiled: May 15, 1992Date of Patent: March 8, 1994Assignee: Hitachi, LtdInventors: Hiroshi Shinriki, Masayuki Nakata, Kiichiro Mukai
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Patent number: 5147500Abstract: A dry etching method is disclosed, in which the pressure of etching gas in a reaction chamber, the bias voltage applied to article to be etched, and the temperature of the article to be etched object are set so that the etching rate for the article to be etched is greater than 0.2 .mu.m/min, a ratio of the length of side etching in the article to be etched to the depth of etching therein is less than 1/100, and a ratio of the etching rate for the article to be etched to the etching rate for a mask formed thereon is greater than 10. Thus, the dry etching method can satisfy three requirements (that is, a high etching rate, a high selection ratio and marked anisotropy in etching) at the same time, although conventional dry etching methods can satisfy only two of three requirements.Type: GrantFiled: October 10, 1990Date of Patent: September 15, 1992Assignee: Hitachi, Ltd.Inventors: Shinichi Tachi, Kazunori Tsujimoto, Sadayuki Okudaira, Kiichiro Mukai
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Patent number: 5079191Abstract: A semiconductor device having a large-capacitance capacitor in which an insulator film is formed underneath a film made of a material having a high dielectric constant, such as tantalum oxide, in such a manner that a portion of the insulator film underneath a defect region which is undesirably thin is thicker than other portions of the insulator film, thereby preventing occurrence of a failure in terms of dielectric strength and deterioration of the lifetime of the capacitor which would otherwise be caused by the existence of the defect region. Also disclosed is a process for producing such semiconductor device. Thus, it is possible to effectively prevent occurrence of problems which would otherwise be caused when a material having a high dielectric constant, such as tantalum oxide, is employed as a dielectric film of a capacitor, so that the reliability of a semiconductor having a large-capacitance capacitor is greatly improved.Type: GrantFiled: May 1, 1990Date of Patent: January 7, 1992Assignee: Hitachi, Ltd.Inventors: Hiroshi Shinriki, Yasushiro Nishioka, Noriyuki Sakuma, Kiichiro Mukai
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Patent number: 5013526Abstract: A superconducting material made of tungsten or molybdenum containing a specified amount of silicon, a wiring made of this superconducting material, and a semiconductor device using this wiring.The above-mentioned superconducting material undegoes no damage even in the steps of heat treatments effected after the formation of a wiring therefrom by virtue of its high melting point, and can be very easily patterned by reactive ion etching using SF.sub.6 as an etching gas, which has heretofore been generally employed. These features, in which conventional superconducting materials are lacking, allow the superconducting material of the present invention to exhibit excellent properties particularly when used in the wirings of a semiconductor device.Type: GrantFiled: November 17, 1989Date of Patent: May 7, 1991Assignee: Hitachi, Ltd.Inventors: Nobuyoshi Kobayashi, Masayuki Suzuki, Seiichi Kondo, Makoto Matsui, Kiichiro Mukai
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Patent number: 4956043Abstract: A dry etching apparatus is disclosed, in which the temperature of an article to be etched, placed on a wafer table, is controlled by a liquefied gas and a heater and the height of the surface of the liquefied gas can be varied arbitrarily. This apparatus enables the controlling of the temperature of the article to be done with a high accuracy over a wide range of low levels. Therefore, a low-temperature dry etching operation, which cannot otherwise be attained by a conventional apparatus of this kind, can be carried out.Type: GrantFiled: May 10, 1988Date of Patent: September 11, 1990Assignee: Hitachi, Ltd.Inventors: Masafumi Kanetomo, Shinichi Tachi, Kazunori Tsujimoto, Kiichiro Mukai, Takahiro Daikoku, Shigekazu Kieda, Keijiro Shindo, Kenshiro Tamura
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Patent number: 4943344Abstract: A deep trench is formed by carrying out etching by using an etching gas free of carbon and silicon, which contains at least one member selected from the group consisting of fluorine, chlorine and bromine, while maintaining an article to be etched at such a temperature that the reaction probability between silicon and fluorine, chlorine or bromine contained in the etching gas is less than 1/10 of the reaction probability at 20.degree. C. According to this method, a deep trench having a very narrow width and a large aspect ratio, which cannot be formed according to the conventional method, can be formed very promptly with much reduced side etching.Type: GrantFiled: June 6, 1989Date of Patent: July 24, 1990Assignee: Hitachi, Ltd.Inventors: Shinichi Tachi, Kazunori Tsujimoto, Sadayuki Okudaira, Kiichiro Mukai
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Patent number: 4937650Abstract: A semiconductor device having a large-capacitance capacitor in which an insulator film is formed underneath a film made of a material having a high dielectric constant, such as tantalum oxide, in such a manner that a portion of the insulator film underneath a defect region which is undesirably thin is thicker than other portions of the insulator film, thereby preventing occurrence of a failure in terms of dielectric strength and deterioration of the lifetime of the capacitor which would otherwise be caused by the existence of the defect region. Also disclosed is a process for producing such semiconductor device. Thus, it is possible to effectively prevent occurrence of problems which would otherwise be caused when a material having a high dielectric constant, such as tantalum oxide, is employed as a dielectric film of a capacitor, so that the reliability of a semiconductor having a large-capacitance capacitor is greatly improved.Type: GrantFiled: September 21, 1988Date of Patent: June 26, 1990Assignee: Hitachi, Ltd.Inventors: Hiroshi Shinriki, Yasushiro Nishioka, Noriyuki Sakuma, Kiichiro Mukai
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Patent number: 4926238Abstract: A semiconductor device wherein a coating film which is made of a polyimide resin or a polyimide isoindoloquinazolinedione resin and which is at least 10 .mu.m thick is disposed on at least an active region of a semiconductor substrate, and the resultant semiconductor substrate is encapsulated in a ceramic package. The semiconductor device has troubles relieved conspicuously, the troubles being ascribable to alpha-rays which come flying from impurities contained in the material of the package.Type: GrantFiled: September 30, 1988Date of Patent: May 15, 1990Assignee: Hitachi, Ltd.Inventors: Kiichiro Mukai, Atsushi Saiki, Seiki Harada
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Patent number: 4897709Abstract: A semiconductor device includes a titanium nitride film as a barrier which is formed in a hole. The width or diameter of the hole is smaller than 1 .mu.m, and the aspect ratio thereof is larger than 0.7. The sidewall of the hole is substantially perpendicular to the surface of a semiconductor substrate. By the low pressure CVD method with a cold wall type CVD apparatus, it becomes possible to form the titanium nitride film having excellent characteristics with a good step coverage in a considerably fine hole having a large aspect ratio.Type: GrantFiled: May 26, 1988Date of Patent: January 30, 1990Assignee: Hitachi, Ltd.Inventors: Natsuki Yokoyama, Yoshio Homma, Kenji Hinode, Kiichiro Mukai
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Patent number: 4891684Abstract: A reaction-preventing film is provided between a capacitor insulating film made of a material having a high dielectric constant, such as Ta.sub.2 O.sub.5, and an upper electrode in order to prevent a reaction of the upper electrode with the capacitor insulating film. This effectively prevents the reaction between the upper electrode and the capacitor caused by a heat treatment conducted after formation of the capacitor, and hence prevents an increase in leakage current caused by the reaction. Thus, the reliability of a semiconductor device is remarkably increased.Type: GrantFiled: August 4, 1987Date of Patent: January 2, 1990Assignee: Hitachi, Ltd.Inventors: Yasushiro Nishioka, Hiroshi Shinriki, Noriyuki Sakuma, Kiichiro Mukai
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Patent number: 4857137Abstract: An ion beam is allowed to hit the surface of a target and the resulting forward scattered particle beam is then allowed to hit the surface of a workpiece, thereby etching or modifying the surface of the workpiece or depositing a film on the surface of the workpiece. By bombardment of ions with the target, electric charges possessed by the ion beam are lost, and only the thus neutralized forward scattered particle beam is allowed to hit the surface of the workpiece, and thus the said surface treatment can be carried out without any electrically charging trouble.Type: GrantFiled: February 2, 1987Date of Patent: August 15, 1989Assignee: Hitachi, Ltd.Inventors: Shinichi Tachi, Sadayuki Okudaira, Kazunori Tsujimoto, Kiichiro Mukai
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Patent number: 4842891Abstract: A copper film is formed by bringing the vapor of an inorganic compound of copper, such as cuprous nitrate that vaporizes upon heating, into contact with a reducing gas in the reaction chamber, so that copper ions are reduced into metal copper that is to be deposited on a substrate. The obtained copper film exhibits very good step coverage and contains very little impurities, lending itself well for forming interconnections of a semiconductor device that has a high degree of integration.Type: GrantFiled: February 8, 1988Date of Patent: June 27, 1989Assignee: Hitachi, Ltd.Inventors: Hiroshi Miyazaki, Yoshio Homma, Kiichiro Mukai
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Patent number: 4809052Abstract: A semiconductor memory device is provided such as the type having flip-flop memory cells each including two bipolar transistors in cross connection with each other. In certain embodiments, at least a part of a Schottky barrier diode or capacitor in the memory cell is formed under a digit line. This memory device is greatly reduced in its required area, and the Schottky barrier diode and capacitor are negligibly influenced by the digit line. In other embodiments, it is arranged to provide different electrodes for the Schottky barrier diode and the capacitor to optimize construction in a minimized space.Type: GrantFiled: May 7, 1986Date of Patent: February 28, 1989Assignee: Hitachi, Ltd.Inventors: Yasushiro Nishioka, Takeo Shiba, Hiroshi Shinriki, Kiichiro Mukai, Akihisa Uchida, Ichiro Mitamura, Keiichi Higeta, Katsumi Ogiue, Kunihiko Yamaguchi, Noriyuki Sakuma
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Patent number: 4636833Abstract: A semiconductor device comprising a first electrode, a dielectric film and a second electrode which are stacked and formed on a semiconductor layer with the second electrode in contact with the semiconductor layer. A diode is formed of the second electrode and the semiconductor layer, and a capacitor is formed of the first electrode, the dielectric film and the second electrode.Type: GrantFiled: March 19, 1984Date of Patent: January 13, 1987Assignee: Hitachi, Ltd.Inventors: Yasushiro Nishioka, Noriyuki Homma, Noriyuki Sakuma, Kiichiro Mukai
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Patent number: 4599135Abstract: In a thin film deposition apparatus, means for depositing a film on a substrate and means for etching the deposited film to make flat the surface thereof, are provided in a reaction vessel independently of each other. This apparatus can rapidly deposit the film without rising the temperature of the substrate excessively. Further, since the deposition means and etching means are independent of each other, the deposition of a film on the substrate and the planarization of the surface of the deposited film can be achieved under various conditions.Type: GrantFiled: September 28, 1984Date of Patent: July 8, 1986Assignee: Hitachi, Ltd.Inventors: Sukeyoshi Tsunekawa, Yoshio Homma, Hiroshi Morisaki, Sadayuki Okudaira, Kiichiro Mukai
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Patent number: 4570175Abstract: At least one layer of insulator film and single-crystal film are alternately stacked and deposited on a surface of a semiconductor substrate, and an impurity-doped region formed in each semiconductor film is used as a gate, source or drain of a MOS transistor.Thus, a three-dimensional semiconductor device is constructed in which MOS transistors are arranged, not only in the direction of the semiconductor substrate surface, but also in a direction perpendicular thereto.Type: GrantFiled: June 16, 1983Date of Patent: February 11, 1986Assignee: Hitachi, Ltd.Inventors: Masanobu Miyao, Makoto Ohkura, Iwao Takemoto, Terunori Warabisako, Kiichiro Mukai, Ryo Haruta, Yasushiro Nishioka, Shinichiro Kimura, Takashi Tokuyama