Patents by Inventor Kiichiro TAKENAKA

Kiichiro TAKENAKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10615839
    Abstract: First to fourth circuits are connected to corresponding first to fourth antenna terminals. The first to fourth circuits transmit and receive a signal of TDD and a signal of FDD. The first to fourth circuits transmit and receive a signal of MIMO. The third circuit receives a signal of a satellite positioning system. The lower limit of the frequency of the signal received by the third circuit and the fourth circuit is higher than the lower limit of the frequency of the signal received by the first circuit and the second circuit.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: April 7, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tsuyoshi Sato, Hidetoshi Matsumoto, Kiichiro Takenaka, Masahiro Ito, Satoshi Tanaka
  • Patent number: 10601382
    Abstract: A power amplifier circuit includes: a first differential amplifier that amplifies a first signal split from the input signal and outputs a second signal; a second differential amplifier that amplifies a third signal split from the input signal and outputs a fourth signal; a first transformer including a first input-side winding to which the second signal is input and a first output-side winding; a second transformer including a second input-side winding to which the fourth signal is input and a second output-side winding; a first phase conversion element that is connected in parallel with the first output-side winding and outputs a fifth signal; and a second phase conversion element that is connected in parallel with the second output-side winding and outputs a sixth signal. The first and second output-side windings are connected in series and output a signal obtained by adding voltages of the fifth and sixth signals together.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: March 24, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kiichiro Takenaka
  • Patent number: 10594341
    Abstract: A high-frequency-signal transceiver circuit transmits and receives a signal between first to sixth antenna terminals and terminals near a high-frequency circuit. The high-frequency-signal transceiver circuit includes first to sixth circuits connected to the corresponding first to sixth antenna terminals. One of the first to sixth circuits transmits and receives only a signal of time division multiplexing communication.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: March 17, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tsuyoshi Sato, Hidetoshi Matsumoto, Kiichiro Takenaka, Masahiro Ito, Satoshi Tanaka
  • Publication number: 20200044673
    Abstract: A transmission unit includes: a power amplification module that amplifies the power of an input signal and outputs an amplified signal; and a power supply module that supplies a power supply voltage to the power amplification module on the basis of a first control signal corresponding to the band width of the input signal. On the basis of the first control signal, the power supply module varies the power supply voltage in accordance with the amplitude level of the input signal in the case where the band width of the input signal is a first band width and varies the power supply voltage in accordance with the average output power of the power amplification module in the case where the band width of the input signal is a second band width that is larger than the first band width.
    Type: Application
    Filed: October 10, 2019
    Publication date: February 6, 2020
    Inventor: Kiichiro TAKENAKA
  • Patent number: 10548092
    Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: January 28, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kiichiro Takenaka, Takayuki Tsutsui, Taizo Yamawaki, Shun Imai
  • Patent number: 10547276
    Abstract: A power amplifier circuit includes a Doherty amplifier including a divider that divides a first signal into a second signal and a third signal, a carrier amplifier that amplifies the second signal and outputs a fourth signal, a peak amplifier that amplifies the third signal and outputs a fifth signal, a combiner that combines the fourth signal and the fifth signal and outputs an amplified signal of the first signal, a first bias circuit that supplies a first bias current or voltage to the carrier amplifier, and a second bias circuit that supplies a second bias current or voltage corresponding to a control signal to the peak amplifier; and a control circuit that supplies the control signal corresponding to a level of the second signal to the second bias circuit. The control circuit includes a detecting unit, an output unit, and a filter circuit.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: January 28, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masahiro Ito, Tsuyoshi Sato, Kiichiro Takenaka, Hidetoshi Matsumoto
  • Publication number: 20190356276
    Abstract: A power amplifier includes a distributor distributing an input first signal to a second signal and a third signal delayed by about 2? degrees (45<?<90) from the second signal, a first amplifier amplifying the second signal and outputting a fourth signal when a first-signal power level is not lower than a first level, a second amplifier amplifying the third signal and outputting a fifth signal when the first-signal power level is not lower than a second level that is greater than the first level, a first phase shifter receiving the fourth signal and outputting a sixth signal delayed by about ? degrees from the fourth signal, a second phase shifter receiving the fifth signal and outputting a seventh signal advanced by about ? degrees from the fifth signal, and a combiner combining the sixth and seventh signals and outputting an amplified signal of the first signal.
    Type: Application
    Filed: July 31, 2019
    Publication date: November 21, 2019
    Inventor: Kiichiro TAKENAKA
  • Patent number: 10484024
    Abstract: A transmission unit includes: a power amplification module that amplifies the power of an input signal and outputs an amplified signal; and a power supply module that supplies a power supply voltage to the power amplification module on the basis of a first control signal corresponding to the band width of the input signal. On the basis of the first control signal, the power supply module varies the power supply voltage in accordance with the amplitude level of the input signal in the case where the band width of the input signal is a first band width and varies the power supply voltage in accordance with the average output power of the power amplification module in the case where the band width of the input signal is a second band width that is larger than the first band width.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: November 19, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kiichiro Takenaka
  • Patent number: 10454434
    Abstract: A communication unit includes a first input terminal to which a first transmission signal based on a first communication standard is input, a second input terminal to which a second transmission signal based on a second communication standard is input, a first transmission signal amplifier circuit outputting a first amplified transmission signal, or outputting a second amplified transmission signal, a first input-output terminal outputting the first amplified transmission signal or the second amplified transmission signal, and at least one of a first reception signal and a second reception signal inputted to the first input-output terminal, a first reception signal amplifier circuit performing at least one of operation of outputting a first amplified reception signal and operation of outputting a second amplified reception signal, a first output terminal outputting the first amplified reception signal, and a second output terminal outputting the second amplified reception signal.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: October 22, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tsuyoshi Sato, Hidetoshi Matsumoto, Kiichiro Takenaka, Masahiro Ito, Satoshi Tanaka, Takahiro Katamata
  • Patent number: 10439560
    Abstract: Provided is a power amplification module that includes: a first power amplifier that amplifies a first signal and outputs a second signal; and a first noise removing circuit that is inputted with a first voltage supplied from a DC-DC converter, removes noise from the first voltage in order to generate a second voltage, and outputs the second voltage as a power supply voltage of the first power amplifier.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: October 8, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tsuyoshi Sato, Kiichiro Takenaka
  • Patent number: 10411653
    Abstract: A power amplifier includes a distributor distributing an input first signal to a second signal and a third signal delayed by about 2? degrees (45<?<90) from the second signal, a first amplifier amplifying the second signal and outputting a fourth signal when a first-signal power level is not lower than a first level, a second amplifier amplifying the third signal and outputting a fifth signal when the first-signal power level is not lower than a second level that is greater than the first level, a first phase shifter receiving the fourth signal and outputting a sixth signal delayed by about ? degrees from the fourth signal, a second phase shifter receiving the fifth signal and outputting a seventh signal advanced by about ? degrees from the fifth signal, and a combiner combining the sixth and seventh signals and outputting an amplified signal of the first signal.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: September 10, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kiichiro Takenaka
  • Publication number: 20190253096
    Abstract: First to fourth circuits are connected to corresponding first to fourth antenna terminals. The first to fourth circuits transmit and receive a signal of TDD and a signal of FDD. The first to fourth circuits transmit and receive a signal of MIMO. The third circuit receives a signal of a satellite positioning system. The lower limit of the frequency of the signal received by the third circuit and the fourth circuit is higher than the lower limit of the frequency of the signal received by the first circuit and the second circuit.
    Type: Application
    Filed: February 5, 2019
    Publication date: August 15, 2019
    Inventors: Tsuyoshi SATO, Hidetoshi MATSUMOTO, Kiichiro TAKENAKA, Masahiro ITO, Satoshi TANAKA
  • Publication number: 20190253086
    Abstract: A high-frequency-signal transceiver circuit transmits and receives a signal between first to sixth antenna terminals and terminals near a high-frequency circuit. The high-frequency-signal transceiver circuit includes first to sixth circuits connected to the corresponding first to sixth antenna terminals. One of the first to sixth circuits transmits and receives only a signal of time division multiplexing communication.
    Type: Application
    Filed: February 13, 2019
    Publication date: August 15, 2019
    Inventors: Tsuyoshi SATO, Hidetoshi MATSUMOTO, Kiichiro TAKENAKA, Masahiro ITO, Satoshi TANAKA
  • Patent number: 10348248
    Abstract: Improvement in linearity is achieved at low costs in a power amplifier module employing an envelope tracking system. The power amplifier module includes a first power amplifier circuit that amplifies a radio frequency signal and that outputs a first amplified signal, a second power amplifier circuit that amplifies the first amplified signal on the basis of a source voltage varying depending on amplitude of the radio frequency signal and that outputs a second amplified signal, and a matching circuit that includes first and second capacitors connected in series between the first and second power amplifier circuit and an inductor connected between a node between the first and second capacitors and a ground and that decreases a gain of the first power amplifier circuit as the source voltage of the second power amplifier circuit increases.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: July 9, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kiichiro Takenaka, Masahiro Ito, Masakazu Hori, Mitsuo Ariie, Hayato Nakamura, Satoshi Arayashiki, Hidetoshi Matsumoto, Tsuyoshi Sato, Satoshi Tanaka
  • Publication number: 20190199298
    Abstract: A matching network is a matching network of a power amplifier circuit that outputs a signal obtained by a differential amplifier amplifying power of a high-frequency signal. The matching network includes an input-side winding connected between differential outputs of the differential amplifier; an output-side winding that is coupled to the input-side winding via an electromagnetic field and whose one end is connected to a reference potential; a first LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the input-side winding; and a second LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the output-side winding.
    Type: Application
    Filed: December 12, 2018
    Publication date: June 27, 2019
    Inventors: Kiichiro TAKENAKA, Masahiro ITO, Tsuyoshi SATO, Kozo SATO, Hidetoshi MATSUMOTO
  • Publication number: 20190181892
    Abstract: A transmission unit includes: a power amplification module that amplifies the power of an input signal and outputs an amplified signal; and a power supply module that supplies a power supply voltage to the power amplification module on the basis of a first control signal corresponding to the band width of the input signal. On the basis of the first control signal, the power supply module varies the power supply voltage in accordance with the amplitude level of the input signal in the case where the band width of the input signal is a first band width and varies the power supply voltage in accordance with the average output power of the power amplification module in the case where the band width of the input signal is a second band width that is larger than the first band width.
    Type: Application
    Filed: December 6, 2018
    Publication date: June 13, 2019
    Inventor: Kiichiro TAKENAKA
  • Publication number: 20190150100
    Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
    Type: Application
    Filed: January 9, 2019
    Publication date: May 16, 2019
    Inventors: Satoshi TANAKA, Kiichiro TAKENAKA, Takayuki TSUTSUI, Taizo YAMAWAKI, Shun IMAI
  • Publication number: 20190081599
    Abstract: A power amplifier circuit includes: a first differential amplifier that amplifies a first signal split from the input signal and outputs a second signal; a second differential amplifier that amplifies a third signal split from the input signal and outputs a fourth signal; a first transformer including a first input-side winding to which the second signal is input and a first output-side winding; a second transformer including a second input-side winding to which the fourth signal is input and a second output-side winding; a first phase conversion element that is connected in parallel with the first output-side winding and outputs a fifth signal; and a second phase conversion element that is connected in parallel with the second output-side winding and outputs a sixth signal. The first and second output-side windings are connected in series and output a signal obtained by adding voltages of the fifth and sixth signals together.
    Type: Application
    Filed: November 13, 2018
    Publication date: March 14, 2019
    Inventor: Kiichiro TAKENAKA
  • Publication number: 20190068129
    Abstract: A power amplifier circuit includes a Doherty amplifier including a divider that divides a first signal into a second signal and a third signal, a carrier amplifier that amplifies the second signal and outputs a fourth signal, a peak amplifier that amplifies the third signal and outputs a fifth signal, a combiner that combines the fourth signal and the fifth signal and outputs an amplified signal of the first signal, a first bias circuit that supplies a first bias current or voltage to the carrier amplifier, and a second bias circuit that supplies a second bias current or voltage corresponding to a control signal to the peak amplifier; and a control circuit that supplies the control signal corresponding to a level of the second signal to the second bias circuit. The control circuit includes a detecting unit, an output unit, and a filter circuit.
    Type: Application
    Filed: August 24, 2018
    Publication date: February 28, 2019
    Inventors: Masahiro Ito, Tsuyoshi Sato, Kiichiro Takenaka, Hidetoshi Matsumoto
  • Patent number: 10212671
    Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: February 19, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kiichiro Takenaka, Takayuki Tsutsui, Taizo Yamawaki, Shun Imai