Patents by Inventor Ki Jin Park
Ki Jin Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11987174Abstract: A lighting device irradiating light to different locations includes a light irradiation unit that generates light; an optical path adjustment unit that adjusts a path of the light radiated from the light irradiation unit to allow a road surface pattern to be formed at a predetermined location on a road surface around a vehicle; and a driving unit that adjusts the optical path adjustment unit to allow the road surface pattern to be formed at different locations on the road surface around the vehicle.Type: GrantFiled: May 23, 2022Date of Patent: May 21, 2024Assignee: SL CorporationInventors: Hye Jin Park, Jong Min Lee, Ki Hae Shin, Jong Woon Kim, Min Gi Jung
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Publication number: 20240160400Abstract: In a sound system that uses over-the-air (OTA), a blockchain platform server is configured to support performance of a virtual sound transaction in a virtual environment. An OTA server is configured to manage a virtual sound transmitted from the blockchain platform server. A vehicle communication control device is configured to perform wireless communication with the OTA server. The vehicle communication control device is configured to download the virtual sound from the OTA server, determine whether the virtual sound is similar to a predetermined specific sound, perform an OTA state test of the virtual sound when the virtual sound is not similar to the predetermined specific sound, and control a sound processing device to play the virtual sound when the virtual sound passes the OTA state test.Type: ApplicationFiled: March 24, 2023Publication date: May 16, 2024Inventors: Ki Chang Kim, Dong Chul Park, Eun Soo Jo, Sang Jin Hong
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Publication number: 20240160004Abstract: An ultra-compact lens system for fluorescence imaging includes a first lens, a second lens and third lens. The first lens has a Meniscus shape including first and second surfaces facing each other. The first surface is concave, and each of the first and second surfaces is an aspherical surface. The second lens is adjacent to the first lens and includes third and fourth surfaces facing each other. Each of the third and fourth surfaces is convex and aspherical surface. The third lens is adjacent to the second lens and includes fifth and sixth surfaces facing each other. Each of the fifth and sixth surfaces is concave and aspherical surface.Type: ApplicationFiled: April 7, 2021Publication date: May 16, 2024Applicant: OSONG MEDICAL INNOVATION FOUNDATIONInventors: Hyeon Jin BANG, Seung Rag LEE, Byung Jun PARK, Ki Ri LEE, Eung Jang LEE
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Publication number: 20240154127Abstract: A positive electrode including a positive electrode active material layer disposed on at least one surface of a positive electrode current collector, the positive electrode active material layer including a lithium transition metal phosphate, a fluorine-based binder, and a conductive material. The lithium transition metal phosphate includes a carbon coating layer formed on a surface thereof, and a ratio (B/A) of a total weight (B) of the fluorine-based binder to a total weight (A) of carbon of the conductive material and the lithium transition metal phosphate in the positive electrode active material layer is 0.7 to 1.7.Type: ApplicationFiled: October 31, 2023Publication date: May 9, 2024Applicant: LG Energy Solution, Ltd.Inventors: Geum Jae Han, O Jong Kwon, Kwang Jin Kim, Ki Woong Kim, In Gu An, Jung Hun Choi, Da Young Lee, Jin Su Sung, Jeong Hwa Park
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Publication number: 20240133519Abstract: A liquefied gas storage tank includes a corner block disposed on a corner portion, wherein the corner block includes a lower block, an upper block and an upper connecting block, the upper block includes a first inner fixing unit and a second inner fixing unit respectively provided inside a first surface and a second surface, bonded and connected to a secondary barrier, and each having a structure in which a primary inner plywood, a primary corner insulating material, and a primary outer plywood are stacked, and an inner bent portion installed at a corner spatial portion between the first inner fixing unit and the second inner fixing unit, and both side surfaces of the inner bent portion that are perpendicular to the secondary barrier each have a height reduced from a total height of each of the first and second inner fixing units.Type: ApplicationFiled: December 14, 2021Publication date: April 25, 2024Inventors: Won Seok HEO, Seong Bo PARK, Hye Min CHO, Ki Joong KIM, Cheon Jin PARK, Min Kyu PARK, Jung Kyu PARK, Byeong Jin JEONG, Dong Woo KIM, Sung Kyu HONG, Gwang Soo GO, Jee Yeon HEO
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Patent number: 11960687Abstract: A manufacturing method of a touch panel includes steps of sequentially forming a metal layer and a blackening layer on a base layer in a multi-chamber, patterning the metal layer and the blackening layer in a mesh pattern, and etching the metal layer and the blackening layer to form a metal mesh electrode with the blackening layer formed.Type: GrantFiled: December 30, 2021Date of Patent: April 16, 2024Assignee: DONGWOO FINE-CHEM CO., LTD.Inventors: Sung Jin Noh, Ki Joon Park, Jungu Lee
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Publication number: 20240099364Abstract: One or more embodiments relate to a cellulose acetate tow, a filter including the same, and an aerosol generating article including the filter.Type: ApplicationFiled: October 18, 2021Publication date: March 28, 2024Applicant: KT&G CORPORATIONInventors: Min Hee HWANG, Man Seok SEO, Chang Jin PARK, Ki Jin AHN
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Publication number: 20240105616Abstract: Various embodiments generally relate to a power distribution network and a semiconductor device, which may include: a plurality of chip pads; a first distribution layer in which a plurality of first conductive lines having rectangular shapes of different sizes, respectively, are disposed; a second distribution layer in which a plurality of second conductive lines including a central cross-shaped conductive line and L-shaped conductive lines open toward respective corners of the second distribution layer are disposed; and a redistribution layer electrically coupling chip pads to which power is applied among the plurality of chip pads and the first conductive lines of the first distribution layer.Type: ApplicationFiled: December 26, 2022Publication date: March 28, 2024Inventors: Ki Bum KANG, Myeong Jin KIM, Jin Hyun KIM, Yun RA, Gyu Sun PARK, Sei Hyung JANG
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Publication number: 20240104709Abstract: A processor implemented method including outputting guide information to guide a capture of an image of a predetermined area via a camera of a mobile terminal including the processor, inputting a first exterior image of a vehicle, the first exterior image being captured based on the output guide information and a second exterior image of the vehicle stored in advance to a processor including a deep learning model, matching the first exterior image and the second exterior image with each other to acquire a matched image, masking a detected area from the predetermined image within the matched image as a masked area, and determining whether an exterior of the vehicle has been damaged and a type of damage based on the masked area.Type: ApplicationFiled: July 7, 2023Publication date: March 28, 2024Applicant: HYUNDAI MOBIS CO., LTD.Inventors: Yeong Hun PARK, Ki Hee PARK, Yu Jin JUNG, June Seung LEE, Hyun Jun LIM
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Publication number: 20240096209Abstract: A system and method for providing a traffic accident handling service for a traffic accident are disclosed, where the method includes acquiring state information of a personal mobility device via a sensor and a camera of the personal mobility device, analyzing the traffic accident based on the acquired state information, receiving accident handling information corresponding to the traffic accident, and providing accident handling guide information based on the accident handling information.Type: ApplicationFiled: July 13, 2023Publication date: March 21, 2024Applicant: HYUNDAI MOBIS CO., LTD.Inventors: Ki Hee PARK, Yeong Hun PARK, Yu Jin JUNG, June Seung LEE, Hyun Jun LIM
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Publication number: 20240084969Abstract: The liquefied gas storage tank includes a primary barrier, a primary insulation wall, a secondary barrier, and a secondary insulation wall. In a state where unit elements are arranged adjacent to each other, each of the unit elements being formed by stacking the secondary insulation wall, the secondary barrier, and a fixed insulation wall which is a part of the primary insulation wall, the primary insulation wall may comprise: a connection insulation wall provided in the space between the adjacent fixed insulation walls; first slits formed between the fixed insulation walls and the connection insulation wall when the connection insulation wall is inserted and installed between the adjacent fixed insulation walls; a plurality of second slits formed in a lengthwise direction and a widthwise direction of the fixed insulation walls; and a first insulating filler material for filling the first slits.Type: ApplicationFiled: December 15, 2021Publication date: March 14, 2024Inventors: Seong Bo PARK, Won Seok HEO, Hye Min CHO, Ki Joong KIM, Cheon Jin PARK, Min Kyu PARK, Jung Kyu PARK, Byeong Jin JEONG, Dong Woo KIM, Sung Kyu HONG, Gwang Soo GO, Jee Yeon HEO
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Patent number: 11924803Abstract: Provided are methods and devices for performing positioning in a next-generation wireless network. The method of a UE for performing positioning include identifying configuration information for a transmission bandwidth of a positioning reference signal (PRS) configured per cell and receiving the positioning reference signal corresponding to each cell based on the configuration information for the transmission bandwidth.Type: GrantFiled: April 8, 2019Date of Patent: March 5, 2024Assignee: KT CORPORATIONInventors: Ki-tae Kim, Woo-jin Choi, Ki-Hyeon Park
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Publication number: 20160104746Abstract: A semiconductor device is fabricated by forming a semiconductor layer on a substrate, patterning the semiconductor layer in a first direction parallel to a top surface of the substrate to form semiconductor patterns extending parallel to the first direction, forming sacrificial patterns in gap regions between the semiconductor patterns, forming mask patterns on the semiconductor patterns and the sacrificial patterns extending parallel to a second direction crossing the first direction, removing the sacrificial patterns, and patterning the semiconductor patterns using the mask patterns as an etch mask to form an array of selection devices for a variable resistance memory device on the substrate.Type: ApplicationFiled: July 16, 2015Publication date: April 14, 2016Inventors: YOUNGSOO LIM, SOONWON HWANG, KI-JIN PARK
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Patent number: 8435876Abstract: A method of manufacturing a semiconductor device includes forming a lower film including a cell region and a peripheral circuit region, forming a first sacrificial film on the lower film, the first sacrificial film having trenches in the cell region, forming a second sacrificial pattern on the first sacrificial film, the second sacrificial pattern having line-shaped patterns spaced apart from each other and crossing the trenches in the cell region, and the second sacrificial pattern covering a top surface of the first sacrificial film in the peripheral circuit region, and patterning the first sacrificial film to form upper holes in portions of the trenches exposed by the second sacrificial pattern.Type: GrantFiled: November 2, 2011Date of Patent: May 7, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jongchul Park, Jong-Kyu Kim, Ki-jin Park, Sangsup Jeong
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Publication number: 20120225554Abstract: A method of manufacturing a semiconductor device, the method including sequentially forming a lower material film, a middle material film, and an upper material film on a semiconductor substrate; and forming an opening that vertically penetrates the upper material film, the middle material film, and the lower material film by etching the upper material film, the middle material film, and the lower material film, wherein the middle material film and the upper material film are formed of material films having etch rates lower than an etch rate of the lower material film with respect to an etchant for etching the lower material film.Type: ApplicationFiled: March 1, 2012Publication date: September 6, 2012Inventors: Kukhan YOON, Cheolkyu LEE, Junsoo LEE, Jong-Kyu KIM, Seong-Mo KOO, Ki-jin PARK
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Publication number: 20120142179Abstract: A method of manufacturing a semiconductor device includes forming a lower film including a cell region and a peripheral circuit region, forming a first sacrificial film on the lower film, the first sacrificial film having trenches in the cell region, forming a second sacrificial pattern on the first sacrificial film, the second sacrificial pattern having line-shaped patterns spaced apart from each other and crossing the trenches in the cell region, and the second sacrificial pattern covering a top surface of the first sacrificial film in the peripheral circuit region, and patterning the first sacrificial film to form upper holes in portions of the trenches exposed by the second sacrificial pattern.Type: ApplicationFiled: November 2, 2011Publication date: June 7, 2012Inventors: Jongchul PARK, Jong-Kyu Kim, Ki-jin Park, Sangsup Jeong
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Patent number: 8053358Abstract: Methods of forming integrated circuit devices include upper sidewall spacers in contact holes to provide enhanced electrical isolation to contact plugs therein while maintaining relatively low contact resistance. These methods include forming an interlayer insulating layer on a semiconductor substrate. The interlayer insulating layer includes at least a first electrically insulating layer of a first material on the semiconductor substrate and a second electrically insulating layer of a second material on the first electrically insulating layer. A contact hole is formed that extends through the interlayer insulating layer and exposes a primary surface of the semiconductor substrate. This contact hole may be formed by selectively etching the second electrically insulating layer and the first electrically insulating layer in sequence and at a faster etch rate of the first material relative to the second material.Type: GrantFiled: December 10, 2010Date of Patent: November 8, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Doo-young Lee, Sang-sup Jeong, Sung-gil Choi, Jong-chul Park, Jin-young Kim, Ki-jin Park
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Publication number: 20110104889Abstract: Methods of forming integrated circuit devices include upper sidewall spacers in contact holes to provide enhanced electrical isolation to contact plugs therein while maintaining relatively low contact resistance. These methods include forming an interlayer insulating layer on a semiconductor substrate. The interlayer insulating layer includes at least a first electrically insulating layer of a first material on the semiconductor substrate and a second electrically insulating layer of a second material on the first electrically insulating layer. A contact hole is formed that extends through the interlayer insulating layer and exposes a primary surface of the semiconductor substrate. This contact hole may be formed by selectively etching the second electrically insulating layer and the first electrically insulating layer in sequence and at a faster etch rate of the first material relative to the second material.Type: ApplicationFiled: December 10, 2010Publication date: May 5, 2011Inventors: Doo-young Lee, Sang-sup Jeong, Sung-gil Chol, Jong-chul Park, Jin-young Kim, Ki-jin Park
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Patent number: 7875551Abstract: Methods of forming integrated circuit devices include upper sidewall spacers in contact holes to provide enhanced electrical isolation to contact plugs therein while maintaining relatively low contact resistance. These methods include forming an interlayer insulating layer on a semiconductor substrate. The interlayer insulating layer includes at least a first electrically insulating layer of a first material on the semiconductor substrate and a second electrically insulating layer of a second material on the first electrically insulating layer. A contact hole is formed that extends through the interlayer insulating layer and exposes a primary surface of the semiconductor substrate. This contact hole may be formed by selectively etching the second electrically insulating layer and the first electrically insulating layer in sequence and at a faster etch rate of the first material relative to the second material.Type: GrantFiled: October 8, 2009Date of Patent: January 25, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Doo-young Lee, Sang-sup Jeong, Sung-gil Choi, Jong-chul Park, Jin-young Kim, Ki-jin Park
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Patent number: 7770833Abstract: A centrifugal brake device capable of preventing backlash of a bait cast reel by using the centrifugal force generated from a spool is disclosed.Type: GrantFiled: April 30, 2009Date of Patent: August 10, 2010Assignee: Banax Co., Ltd.Inventors: Yong Sub Noh, Ki Jin Park