Patents by Inventor Kiju Im

Kiju Im has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12016203
    Abstract: A display device having a thin-film transistor with increased mobility of electrons or holes includes a first semiconductor layer arranged on a substrate and including a first channel region, a first source region, and a first drain region; a first stressor arranged between the substrate and the first semiconductor layer and which overlaps the first source region in a plan view; a second stressor arranged between the substrate and the first semiconductor layer and which overlaps the first drain region in the plan view, where the second stressor is spaced apart from the first stressor; a gate insulating layer arranged on the first semiconductor layer; and a first gate electrode arranged on the gate insulating layer and which overlaps the first semiconductor layer in the plan view.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: June 18, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Junehwan Kim, Taeyoung Kim, Jongwoo Park, Kiju Im, Hyuncheol Hwang
  • Publication number: 20230085460
    Abstract: A display device includes a display panel and a metal plate disposed under the display panel, where the metal plate includes a first area and a second area which is adjacent to the first area, and a plurality of through holes is defined through the metal plate. The plurality of through holes includes a first through hole and a second through hole, which are spaced apart from each other at a first interval in the first area, and a third through hole and a fourth through hole, which are spaced apart from each other at a second interval in the second area, and the first interval is different from the second interval.
    Type: Application
    Filed: March 24, 2022
    Publication date: March 16, 2023
    Inventors: Kiju Im, Jongwoo Park, Hyeokjae Kwon, Yoonho Kim, Jongyeob Kim, Junehwan Kim, Taeyoung Kim, Hyuncheol Hwang
  • Patent number: 11335867
    Abstract: A display panel includes: a plurality of display elements arranged in a display area around an opening, each of the display elements including a pixel electrode, an emission layer above the pixel electrode, and an opposite electrode above the emission layer; and a groove between the opening and the display area, wherein the groove includes a first recessed portion having a first width in a first layer, and a second recessed portion in a second layer on the first layer and having a second width greater than the first width, and a side surface of the groove includes steps.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: May 17, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Younjae Jung, Jongwoo Park, Taeyoung Kim, Hyojung Kim, Kiju Im, Hyuncheol Hwang
  • Publication number: 20210335926
    Abstract: A display device having a thin-film transistor with increased mobility of electrons or holes includes a first semiconductor layer arranged on a substrate and including a first channel region, a first source region, and a first drain region; a first stressor arranged between the substrate and the first semiconductor layer and which overlaps the first source region in a plan view; a second stressor arranged between the substrate and the first semiconductor layer and which overlaps the first drain region in the plan view, where the second stressor is spaced apart from the first stressor; a gate insulating layer arranged on the first semiconductor layer; and a first gate electrode arranged on the gate insulating layer and which overlaps the first semiconductor layer in the plan view.
    Type: Application
    Filed: January 4, 2021
    Publication date: October 28, 2021
    Inventors: Junehwan Kim, Taeyoung Kim, Jongwoo Park, Kiju Im, Hyuncheol Hwang
  • Publication number: 20200313101
    Abstract: A display panel includes: a plurality of display elements arranged in a display area around an opening, each of the display elements including a pixel electrode, an emission layer above the pixel electrode, and an opposite electrode above the emission layer; and a groove between the opening and the display area, wherein the groove includes a first recessed portion having a first width in a first layer, and a second recessed portion in a second layer on the first layer and having a second width greater than the first width, and a side surface of the groove includes steps.
    Type: Application
    Filed: December 18, 2019
    Publication date: October 1, 2020
    Inventors: Younjae Jung, Jongwoo Park, Taeyoung Kim, Hyojung Kim, Kiju Im, Hyuncheol Hwang
  • Patent number: 10175792
    Abstract: A rollable display device includes a flexible display module configured to display an image, a roller configured to roll up the flexible display module, and a plurality of support block groups each including a plurality of support blocks on the flexible display module and arranged in a first direction crossing a second direction of a rolling axis of the roller, the plurality of support block groups including a first support block group including first support blocks, and a second support block group including second support blocks each having a width in the first direction that is greater than a width of a corresponding one of the first support blocks in the first direction, wherein the first support block group is between the roller and the second support block group.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: January 8, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Min-sung Kim, Thanh Tien Nguyen, Kiju Im
  • Patent number: 10031036
    Abstract: A display apparatus includes a substrate including a first area, a second area, and a bending area, the bending area disposed between the first area and the second area and bending about a bending axis running along a first direction; a first piezoelectric device disposed over the bending area; and a pressure sensor. The first piezoelectric device is configured to contract or expand according to a pressure variation sensed by the pressure sensor.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: July 24, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Minsung Kim, Thanhtien Nguyen, Kiju Im
  • Publication number: 20170219444
    Abstract: A display apparatus includes a substrate including a first area, a second area, and a bending area, the bending area disposed between the first area and the second area and bending about a bending axis running along a first direction; a first piezoelectric device disposed over the bending area; and a pressure sensor. The first piezoelectric device is configured to contract or expand according to a pressure variation sensed by the pressure sensor.
    Type: Application
    Filed: January 27, 2017
    Publication date: August 3, 2017
    Inventors: MINSUNG KIM, THANHTIEN NGUYEN, KIJU IM
  • Publication number: 20160231843
    Abstract: A rollable display device includes a flexible display module configured to display an image, a roller configured to roll up the flexible display module, and a plurality of support block groups each including a plurality of support blocks on the flexible display module and arranged in a first direction crossing a second direction of a rolling axis of the roller, the plurality of support block groups including a first support block group including first support blocks, and a second support block group including second support blocks each having a width in the first direction that is greater than a width of a corresponding one of the first support blocks in the first direction, wherein the first support block group is between the roller and the second support block group.
    Type: Application
    Filed: December 3, 2015
    Publication date: August 11, 2016
    Inventors: Min-sung Kim, Thanh Tien Nguyen, Kiju Im
  • Publication number: 20160179257
    Abstract: A display apparatus includes a display panel to display an image, the display panel including a flat part and an edge part at least at one side of the flat part and bent toward a direction in which the image is displayed, and a cover member surrounding an end portion of the edge part.
    Type: Application
    Filed: October 6, 2015
    Publication date: June 23, 2016
    Inventors: Kiju IM, Min-Sung KIM, Thanh Tien NGUYEN, Eun Young LEE
  • Patent number: 8263905
    Abstract: Provided are a heat generation sheet and a method of fabricating the same. The heat generation sheet includes: a base comprising first and second sides; a heat generation layer which is formed in at least one region of the first side of the base and in which a plurality of conductive nanoparticles are physically necked; a protective layer protecting the heat generation layer; and an electric feeding part supplying power to the heat generation layer. The heat generation layer is formed by coating and heat treating a nanoparticle dispersion solution.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: September 11, 2012
    Assignee: Kiju Im
    Inventors: Sangsig Kim, Kyoungah Cho, Kiju Im
  • Publication number: 20090262175
    Abstract: Provided are a heat generation sheet and a method of fabricating the same. The heat generation sheet includes: a base comprising first and second sides; a heat generation layer which is formed in at least one region of the first side of the base and in which a plurality of conductive nanoparticles are physically necked; a protective layer protecting the heat generation layer; and an electric feeding part supplying power to the heat generation layer. The heat generation layer is formed by coating and heat treating a nanoparticle dispersion solution.
    Type: Application
    Filed: February 10, 2009
    Publication date: October 22, 2009
    Applicant: Korea University Industrial & Academic Collaboration Foundation
    Inventors: Sangsig Kim, Kyoungah Cho, Kiju Im
  • Patent number: 7195962
    Abstract: Provided is a MOSFET with an ultra short channel length and a method of fabricating the same. The ultra short channel MOSFET has a silicon wire channel region with a three-dimensional structure, and a source/drain junction formed in a silicon conductive layer formed of both sides of the silicon wire channel region. Also, a gate electrode formed on the upper surface of the silicon wire channel region by interposing a gate insulating layer having a high dielectric constant therebetween, and source and drain electrodes connected to the source/drain junction are included. The silicon wire channel region is formed with a triangular or trapezoidal section by taking advantage of different etch rates that depend on the planar orientation of the silicon. The source/drain junction is formed by a solid-state diffusion method.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: March 27, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Wonju Cho, Seong Jae Lee, Jong Heon Yang, Jihun Oh, Kiju Im, Chang Geun Anh
  • Publication number: 20060131648
    Abstract: There are provided an ultra thin film silicon on insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) having a recessed source/drain structure, and a method of fabricating the same.
    Type: Application
    Filed: May 26, 2005
    Publication date: June 22, 2006
    Inventors: Chang Ahn, Wonju Cho, Kiju Im, Jong Yang, In Baek, Seong Lee, Sung Baek
  • Patent number: 6995452
    Abstract: Provided are an SOI MOSFET device with a nanoscale channel that has a source/drain region including a shallow extension region and a deep junction region formed by solid-phase diffusion and a method of manufacturing the SOI MOSFET device. In the method of manufacturing the MOSFET device, the shallow extension region and the deep junction region that form the source/drain region are formed at the same time using first and second silicon oxide films doped with different impurities. The effective channel length of the device can be scaled down by adjusting the thickness and etching rate of the second silicon oxide film doped with the second impurity. The source/drain region is formed on the substrate before the formation of a gate electrode, thereby easily controlling impurity distribution in the channel. An impurity activation process of the source/drain region can be omitted, thereby preventing a change in a threshold voltage of the device. A solid-phase impurity is diffused.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: February 7, 2006
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Wonju Cho, Seong Jae Lee, Jong Heon Yang, Jihun Oh, Kiju Im
  • Publication number: 20050009250
    Abstract: Provided is a MOSFET with an ultra short channel length and a method of fabricating the same. The ultra short channel MOSFET has a silicon wire channel region with a three-dimensional structure, and a source/drain junction formed in a silicon conductive layer formed of both sides of the silicon wire channel region. Also, a gate electrode formed on the upper surface of the silicon wire channel region by interposing a gate insulating layer having a high dielectric constant therebetween, and source and drain electrodes connected to the source/drain junction are included. The silicon wire channel region is formed with a triangular or trapezoidal section by taking advantage of different etch rates that depend on the planar orientation of the silicon. The source/drain junction is formed by a solid-state diffusion method.
    Type: Application
    Filed: April 27, 2004
    Publication date: January 13, 2005
    Inventors: Wonju Cho, Seong Lee, Jong Yang, Jihun Oh, Kiju Im, Chang Anh
  • Publication number: 20040203198
    Abstract: Provided are an SOI MOSFET device with a nanoscale channel that has a source/drain region including a shallow extension region and a deep junction region formed by solid-phase diffusion and a method of manufacturing the SOI MOSFET device. In the method of manufacturing the MOSFET device, the shallow extension region and the deep junction region that form the source/drain region are formed at the same time using first and second silicon oxide films doped with different impurities. The effective channel length of the device can be scaled down by adjusting the thickness and etching rate of the second silicon oxide film doped with the second impurity. The source/drain region is formed on the substrate before the formation of a gate electrode, thereby easily controlling impurity distribution in the channel. An impurity activation process of the source/drain region can be omitted, thereby preventing a change in a threshold voltage of the device. A solid-phase impurity is diffused.
    Type: Application
    Filed: December 30, 2003
    Publication date: October 14, 2004
    Inventors: Wonju Cho, Seong Jae Lee, Jong Heon Yang, Jihun Oh, Kiju Im