Patents by Inventor Kikuko Ishida

Kikuko Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device with high-breakdown-voltage transistors
    Patent number: 7583533
    Abstract: A semiconductor device includes a unit high-breakdown-voltage transistor includes first to fourth high-breakdown-voltage transistors. The first high-breakdown-voltage transistor is connected to a first write line at the other end of the current path thereof, and includes a first gate which is disposed in a first direction. The second high-breakdown-voltage transistor is connected to a second write line at the other end of the current path thereof, and includes a second gate which is disposed in a second direction crossing the first direction. The third high-breakdown-voltage transistor is connected to a third write line at the other end of the current path thereof, and includes a third gate which is disposed in the first direction. The fourth high-breakdown-voltage transistor is connected to a fourth write line at the other end of the current path thereof, and includes a fourth gate which is disposed in the second direction.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: September 1, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki Kutsukake, Kikuko Ishida
  • SEMICONDUCTOR DEVICE WITH THE HIGH-BREAKDOWN-VOLTAGE TRANSISTORS
    Publication number: 20080055992
    Abstract: A semiconductor device includes a unit high-breakdown-voltage transistor includes first to fourth high-breakdown-voltage transistors. The first high-breakdown-voltage transistor is connected to a first write line at the other end of the current path thereof, and includes a first gate which is disposed in a first direction. The second high-breakdown-voltage transistor is connected to a second write line at the other end of the current path thereof, and includes a second gate which is disposed in a second direction crossing the first direction. The third high-breakdown-voltage transistor is connected to a third write line at the other end of the current path thereof, and includes a third gate which is disposed in the first direction. The fourth high-breakdown-voltage transistor is connected to a fourth write line at the other end of the current path thereof, and includes a fourth gate which is disposed in the second direction.
    Type: Application
    Filed: September 4, 2007
    Publication date: March 6, 2008
    Inventors: Hiroyuki Kutsukake, Kikuko Ishida