Patents by Inventor Kikuo Kimura

Kikuo Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4915637
    Abstract: A wiring device is provided wherein a junction block (abbreviated to "J.B.") (a) which is used for electric wiring of an automobile, and an electronic unit (b) whose case (4,5) receives therein a printed circuit plate (e) formed with a functional circuit for connecting signals between wire harnesses and which is provided with a J.B. coupling connector (8) and an external coupling connector (7) at an outer periphery of the case, are detachably connected by the J.B. coupling connector. Signals from the function block are transmitted to the J.B. by way of a function-preset wiring device for an automobile comprising a through terminal (c) which is formed with a J.B. connecting portion (c.sub.1) at one end of a base plate (9) and an external output terminal portion (c.sub.2) at the other end thereof, and a branch terminal (d) which has lead terminals (23) associated with elastic sandwiching pieces (19) for receiving the external output terminal portion of the through terminals.
    Type: Grant
    Filed: July 15, 1988
    Date of Patent: April 10, 1990
    Assignee: Yazaki Corporation
    Inventors: Kikuo Ogawa, Kikuo Kimura
  • Patent number: 4822965
    Abstract: A lid lock mechanism in an automobile switch panel device. The mechanism includes an open-top case, a switch panel accommodated in said case, a lid to cover the open-top case, pivotal shafts provided in the open-top case, and clutch members provided in a pair of holes in the lid. At a predetermined opening angle, the lid is maintained in a locked condition while the lid is easily closed manually with a force stronger than a predetermined level.
    Type: Grant
    Filed: July 20, 1987
    Date of Patent: April 18, 1989
    Assignee: Yazaki Corporation
    Inventors: Yukihiro Hyogo, Kikuo Kimura, Satoshi Iida, Kazuya Arai
  • Patent number: 4799893
    Abstract: A wiring device is provided wherein a junction block (abbreviated to "J. B.") (a) which is used for electric wiring of an automobile, and an electronic unit (b) whose case (4,5,) receives therein a printed circuit plate (e) formed with a functional circuit for connecting signals between wire harnesses and which is provided with a J. B. coupling connector (8) and an external coupling connector (7) at an outer periphery of the case, are detachably connected by the J. B. coupling connector. Signals from the function block are transmitted to the J. B. by way of a function-preset wiring device for an automobile comprising a through terminal (c) which is formed with a J. B. connecting portion (c.sub.1) at one end of a base plate (9) and an external output terminal portion (c.sub.2) at the other end thereof, and a branch terminal (d) which has lead terminals (23) associated with elastic sandwiching pieces (19) for receiving the external output terminal portion of the through terminals.
    Type: Grant
    Filed: April 28, 1987
    Date of Patent: January 24, 1989
    Assignee: Yazaki Corporation
    Inventors: Kikuo Ogawa, Kikuo Kimura
  • Patent number: 4638184
    Abstract: A bias generating circuit for reducing an external DC power supply voltage to a predetermined, lower, stable DC voltage used as a power source for internal logic circuits in a semiconductor IC chip includes an oscillator for converting the external DC voltage into a pulse signal, a smoothing circuit for converting a pulse signal into the lower DC voltage, and a control circuit interposed between the oscillator and the smoothing circuit for varying the pulse duration of the pulse signal from the oscillator to a changed pulse signal, and for regulating the lower DC voltage to a predetermined amplitude in response to the voltage variation in the lower DC voltage. The control circuit comprises a CMOS inverter, a CMOS buffer circuit for varying the pulse duration of the output signal of the CMOS inverter, and a voltage compensating circuit for controlling the transconductance of the CMOS inverter in response to the variation of the lower DC voltage.
    Type: Grant
    Filed: September 13, 1984
    Date of Patent: January 20, 1987
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Kikuo Kimura