Patents by Inventor Kil-Won Lee
Kil-Won Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10763677Abstract: The present invention relates to a battery energy storage system including: a plurality of battery boxes provided with a plurality of battery packs; a plurality of power converter systems respectively connected to the plurality of battery boxes to selectively charge or discharge the plurality of battery boxes through alternating current supplied from an external power source device; a transformer disposed between the external power source device and the plurality of power converter systems; and a controller controlling the plurality of power converter systems to selectively charge or discharge the plurality of battery boxes.Type: GrantFiled: March 2, 2017Date of Patent: September 1, 2020Assignee: LG CHEM, LTD.Inventors: Dong Hoe Kim, Chan Min Park, Tae Shin Cho, Jong Min Park, Kil Won Lee
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Publication number: 20170256964Abstract: The present invention relates to a battery energy storage system including: a plurality of battery boxes provided with a plurality of battery packs; a plurality of power converter systems respectively connected to the plurality of battery boxes to selectively charge or discharge the plurality of battery boxes through alternating current supplied from an external power source device; a transformer disposed between the external power source device and the plurality of power converter systems; and a controller controlling the plurality of power converter systems to selectively charge or discharge the plurality of battery boxes.Type: ApplicationFiled: March 2, 2017Publication date: September 7, 2017Applicant: LG CHEM, LTD.Inventors: Dong Hoe KIM, Chan Min PARK, Tae Shin CHO, Jong Min PARK, Kil Won LEE
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Patent number: 9576797Abstract: A method of fabricating a polysilicon layer includes forming a buffer layer on a substrate, forming a metal catalyst layer on the buffer layer, diffusing a metal catalyst into the metal catalyst layer to the buffer layer, removing the metal catalyst layer, forming an amorphous silicon layer on the buffer layer, and annealing the substrate to crystallize the amorphous silicon layer into a polysilicon layer. The thin film transistor includes a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed above the substrate and on the semiconductor layer, a gate electrode disposed on the gate insulating layer, a source electrode and a drain electrode both electrically connected to the semiconductor layer, and a metal silicide disposed between the buffer layer and the semiconductor layer.Type: GrantFiled: May 26, 2015Date of Patent: February 21, 2017Assignee: Samsung Display Co., Ltd.Inventors: Dong-Hyun Lee, Ki-Yong Lee, Jin-Wook Seo, Tae-Hoon Yang, Yun-Mo Chung, Byoung-Keon Park, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi, Byung-Soo So
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Patent number: 9406730Abstract: A method of forming a polycrystalline silicon layer includes forming a first amorphous silicon layer and forming a second amorphous silicon layer such that the first amorphous silicon layer and the second amorphous silicon layer have different film qualities from each other, and crystallizing the first amorphous silicon layer and the second amorphous silicon layer using a metal catalyst to form a first polycrystalline silicon layer and a second polycrystalline silicon layer. A thin film transistor includes the polycrystalline silicon layer formed by the method and an organic light emitting device includes the thin film transistor.Type: GrantFiled: September 19, 2014Date of Patent: August 2, 2016Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Byoung-Keon Park, Jong-Ryuk Park, Yun-Mo Chung, Tak-Young Lee, Jin-Wook Seo, Ki-Yong Lee, Min-Jae Jeong, Yong-Duck Son, Byung-Soo So, Seung-Kyu Park, Dong-Hyun Lee, Kil-Won Lee, Jae-Wan Jung
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Patent number: 9142405Abstract: A thin film transistor including a first polycrystalline semiconductor layer disposed on a substrate, a second polycrystalline semiconductor layer disposed on the first polycrystalline semiconductor layer, and metal catalysts configured to adjoin the first polycrystalline semiconductor layer and spaced apart from one another at specific intervals.Type: GrantFiled: December 9, 2010Date of Patent: September 22, 2015Assignee: Samsung Display Co., Ltd.Inventors: Yong-Duck Son, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Byung-Soo So, Seung-Kyu Park, Kil-Won Lee, Yun-Mo Chung, Byoung-Keon Park, Dong-Hyun Lee, Jong-Ryuk Park, Tak-Young Lee, Jae-Wan Jung
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Publication number: 20150255282Abstract: A method of fabricating a polysilicon layer includes forming a buffer layer on a substrate, forming a metal catalyst layer on the buffer layer, diffusing a metal catalyst into the metal catalyst layer to the buffer layer, removing the metal catalyst layer, forming an amorphous silicon layer on the buffer layer, and annealing the substrate to crystallize the amorphous silicon layer into a polysilicon layer. The thin film transistor includes a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed above the substrate and on the semiconductor layer, a gate electrode disposed on the gate insulating layer, a source electrode and a drain electrode both electrically connected to the semiconductor layer, and a metal silicide disposed between the buffer layer and the semiconductor layer.Type: ApplicationFiled: May 26, 2015Publication date: September 10, 2015Inventors: Dong-Hyun LEE, Ki-Yong LEE, Jin-Wook SEO, Tae-Hoon YANG, Yun-Mo CHUNG, Byoung-Keon PARK, Kil-Won LEE, Jong-Ryuk PARK, Bo-Kyung CHOI, Byung-Soo SO
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Patent number: 9117798Abstract: A thin film transistor, a method of fabricating the same, and an organic light emitting diode (OLED) display device including the same. The thin film transistor includes a substrate; a semiconductor layer disposed on the substrate and including a channel region; source/drain regions including ions and an offset region; a gate insulating layer disposed on the semiconductor layer; a gate electrode disposed on the gate insulating layer; a first insulating layer disposed on the gate electrode; a second insulating layer disposed on the first insulating layer; and source/drain electrodes disposed on the second insulating layer, and electrically connected to the source/drain regions of the semiconductor layer, respectively. The sum of thicknesses of the gate insulating layer and the first insulating layer that are on the source/drain regions is less than the vertical dispersion depth of the ions included in the source/drain regions.Type: GrantFiled: February 26, 2010Date of Patent: August 25, 2015Assignee: Samsung Display Co., Ltd.Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Ki-Yong Lee, Hyun-Gue Kim, Maxim Lisachenko, Dong-Hyun Lee, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi
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Patent number: 9070717Abstract: A method of fabricating an organic light emitting diode (OLED) display device having a thin film transistor including a polysilicon layer. The method of fabricating a polysilicon layer includes forming a buffer layer on a substrate, forming a metal catalyst layer on the buffer layer, diffusing a metal catalyst into the metal catalyst layer to the buffer layer, removing the metal catalyst layer, forming an amorphous silicon layer on the buffer layer, and annealing the substrate to crystallize the amorphous silicon layer into a polysilicon layer. The thin film transistor includes a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed above the substrate and on the semiconductor layer, a gate electrode disposed on the gate insulating layer, a source electrode and a drain electrode both electrically connected to the semiconductor layer, and a metal silicide disposed between the buffer layer and the semiconductor layer.Type: GrantFiled: September 24, 2010Date of Patent: June 30, 2015Assignee: Samsung Display Co., Ltd.Inventors: Dong-Hyun Lee, Ki-Yong Lee, Jin-Wook Seo, Tae-Hoon Yang, Yun-Mo Chung, Byoung-Keon Park, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi, Byung-Soo So
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Patent number: 9034156Abstract: Provided is a sputtering apparatus which deposits a metal catalyst on an amorphous silicon layer at an extremely low concentration in order to crystallize amorphous silicon, and particularly minimizes non-uniformity of the metal catalyst caused by a pre-sputtering process without reducing process efficiency. This sputtering apparatus improves the uniformity of the metal catalyst deposited on the amorphous silicon layer at an extremely low concentration. The sputtering apparatus includes a process chamber having first and second regions, a metal target located inside the process chamber, a target transfer unit moving the metal target and having a first shield for controlling a traveling direction of a metal catalyst discharged from the metal target, and a substrate holder disposed in the second region to be capable of facing the metal target.Type: GrantFiled: November 17, 2010Date of Patent: May 19, 2015Assignee: Samsung Display Co., Ltd.Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park, Yun-Mo Chung, Dong-Hyun Lee, Kil-Won Lee, Jae-Wan Jung, Jong-Ryuk Park, Bo-Kyung Choi, Won-Bong Baek, Byung-Soo So, Jong-Won Hong, Min-Jae Jeong, Heung-Yeol Na, Ivan Maidanchuk, Eu-Gene Kang, Seok-Rak Chang
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Patent number: 9035311Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a lower capacitor electrode disposed on the gate insulating layer in the capacitor region, an interlayer insulating layer disposed on the substrate, and an upper capacitor electrode disposed on the interlayer insulating layer and facing the lower capacitor electrode, wherein regions of each of the buffer layer, the gate insulating layer, the interlayer insulating layer, the lower capacitor electrode, and the upper capacitor electrode have surfaces in which protrusions having the same shape as grain boundaries of the semiconductor layer are formed. The resultant capacitor has an increased surface area, and therefore, an increased capacitance.Type: GrantFiled: March 15, 2013Date of Patent: May 19, 2015Assignee: Samsung Display Co., Ltd.Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Soo-Beom Jo, Dong-Hyun Lee, Kil-Won Lee, Maxim Lisachenko, Yun-Mo Chung, Bo-Kyung Choi, Jong-Ryuk Park, Ki-Yong Lee
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Patent number: 8992749Abstract: Provided is a sputtering apparatus which deposits a metal catalyst on an amorphous silicon layer at an extremely low concentration in order to crystallize amorphous silicon, and particularly minimizes non-uniformity of the metal catalyst caused by a pre-sputtering process without reducing process efficiency. This sputtering apparatus improves the uniformity of the metal catalyst deposited on the amorphous silicon layer at an extremely low concentration. The sputtering apparatus includes a process chamber having first and second regions, a metal target located inside the process chamber, a target transfer unit moving the metal target and having a first shield for controlling a traveling direction of a metal catalyst discharged from the metal target, and a substrate holder disposed in the second region to be capable of facing the metal target.Type: GrantFiled: November 17, 2010Date of Patent: March 31, 2015Assignee: Samsung Display Co., Ltd.Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park, Yun-Mo Chung, Dong-Hyun Lee, Kil-Won Lee, Jae-Wan Jung, Jong-Ryuk Park, Bo-Kyung Choi, Won-Bong Baek, Byung-Soo So, Jong-Won Hong, Min-Jae Jeong, Heung-Yeol Na, Ivan Maidanchuk, Eu-Gene Kang, Seok-Rak Chang
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Patent number: 8987723Abstract: A display device including: a substrate; a first semiconductor layer disposed on the substrate; a second semiconductor layer disposed on the substrate and adjacent to the first semiconductor layer; a first insulation layer disposed on both the first semiconductor layer and the second semiconductor layer, the first insulation layer including a first opening forming a space between the first semiconductor layer and the second semiconductor layer; and a second insulation layer disposed on the first insulation layer and that fills the first opening.Type: GrantFiled: October 17, 2013Date of Patent: March 24, 2015Assignee: Samsung Display Co., Ltd.Inventors: Byoung-Keon Park, Jin-Wook Seo, Ki-Yong Lee, Yun-Mo Chung, Jong-Ryuk Park, Tak-Young Lee, Dong-Hyun Lee, Kil-Won Lee, Byung-Soo So, Yong-Duck Son, Seung-Kyu Park, Jae-Wan Jung, Min-Jae Jeong
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Publication number: 20150001523Abstract: A method of forming a polycrystalline silicon layer includes forming a first amorphous silicon layer and forming a second amorphous silicon layer such that the first amorphous silicon layer and the second amorphous silicon layer have different film qualities from each other, and crystallizing the first amorphous silicon layer and the second amorphous silicon layer using a metal catalyst to form a first polycrystalline silicon layer and a second polycrystalline silicon layer. A thin film transistor includes the polycrystalline silicon layer formed by the method and an organic light emitting device includes the thin film transistor.Type: ApplicationFiled: September 19, 2014Publication date: January 1, 2015Inventors: Byoung-Keon PARK, Jong-Ryuk PARK, Yun-Mo CHUNG, Tak-Young LEE, Jin-Wook SEO, Ki-Yong LEE, Min-Jae JEONG, Yong-Duck SON, Byung-Soo SO, Seung-Kyu PARK, Dong-Hyun LEE, Kil-Won LEE, Jae-Wan Jung
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Publication number: 20140363936Abstract: A thin film transistor (TFT) and an organic light emitting diode (OLED) display device. The TFT and the OLED display device include a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate electrode insulated from the semiconductor layer, a gate insulating layer insulating the semiconductor layer from the gate electrode, and source and drain electrodes insulated from the gate electrode and partially connected to the semiconductor layer, wherein the semiconductor layer is formed from a polycrystalline silicon layer crystallized by a metal catalyst and the metal catalyst is removed by gettering using an etchant. In addition, the OLED display device includes an insulating layer disposed on the entire surface of the substrate, a first electrode disposed on the insulating layer and electrically connected to one of the source and drain electrodes, an organic layer, and a second electrode.Type: ApplicationFiled: June 12, 2014Publication date: December 11, 2014Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Ki-Yong Lee, Maxim Lisachenko, Bo-Kyung Choi, Dae-Woo Lee, Kil-Won Lee, Dong-Hyun Lee, Jong-Ryuk Park, Ji-Su Ahn, Young-Dae Kim, Heung-Yeol Na, Min-Jae Jeong, Yun-Mo Chung, Jong-Won Hong, Eu-Gene Kang, Seok-RaK Chang, Jae-Wan Jung, Sang-Yon Yoon
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Patent number: 8894768Abstract: A substrate processing apparatus that simultaneously forms thin films on a plurality of substrates and performs heat treatment includes: a plurality of substrate holders, each including a substrate support that supports a substrate and a first gas pipe having one or a plurality of injection holes; a boat where the plurality of substrate holders are stacked and including a second gas pipe connected with the first gas pipe of each of the substrate holders; a process chamber providing a space in which the substrates stacked in the boat are processed; a conveying unit that carries the boat into/out of the process chamber; a first heating unit disposed outside the process chamber; and a gas supply unit including a third gas pipe connected with the second gas pipe and supplying a heated or cooled gas into the second gas pipe.Type: GrantFiled: January 6, 2011Date of Patent: November 25, 2014Assignee: Samsung Display Co., Ltd.Inventors: Byoung-Keon Park, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Jong-Won Hong, Heung-Yeol Na, Tae-Hoon Yang, Yun-Mo Chung, Eu-Gene Kang, Seok-Rak Chang, Dong-Hyun Lee, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi, Won-Bong Baek, Ivan Maidanchuk, Byung-Soo So, Jae-Wan Jung
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Patent number: 8890165Abstract: A method of forming a polycrystalline silicon layer, a thin film transistor (TFT), an organic light emitting diode (OLED) display device having the same, and methods of fabricating the same. The method of forming a polycrystalline silicon layer includes providing a substrate, forming a buffer layer on the substrate, forming an amorphous silicon layer on the buffer layer, forming a groove in the amorphous silicon layer, forming a capping layer on the amorphous silicon layer, forming a metal catalyst layer on the capping layer, and annealing the substrate and crystallizing the amorphous silicon layer into a polycrystalline silicon layer.Type: GrantFiled: February 26, 2010Date of Patent: November 18, 2014Assignee: Samsung Display Co., Ltd.Inventors: Dong-Hyun Lee, Ki-Yong Lee, Jin-Wook Seo, Tae-Hoon Yang, Maxim Lisachenko, Byoung-Keon Park, Kil-Won Lee, Jae-Wan Jung
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Patent number: 8841206Abstract: A method of forming a polycrystalline silicon layer includes forming a first amorphous silicon layer and forming a second amorphous silicon layer such that the first amorphous silicon layer and the second amorphous silicon layer have different film qualities from each other, and crystallizing the first amorphous silicon layer and the second amorphous silicon layer using a metal catalyst to form a first polycrystalline silicon layer and a second polycrystalline silicon layer. A thin film transistor includes the polycrystalline silicon layer formed by the method and an organic light emitting device includes the thin film transistor.Type: GrantFiled: August 17, 2011Date of Patent: September 23, 2014Assignee: Samsung Display Co., Ltd.Inventors: Byoung-Keon Park, Jong-Ryuk Park, Yun-Mo Chung, Tak-Young Lee, Jin-Wook Seo, Ki-Yong Lee, Min-Jae Jeong, Yong-Duck Son, Byung-Soo So, Seung-Kyu Park, Dong-Hyun Lee, Kil-Won Lee, Jae-Wan Jung
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Patent number: 8841194Abstract: In one aspect, a method of forming a polysilicon (poly-Si) layer and a method of manufacturing a thin film transistor (TFT) using the poly-Si layer is provided. In one aspect, the method of forming a polysilicon (poly-Si) layer includes forming an amorphous silicon (a-Si) layer on a substrate in a chamber; cleaning the chamber; removing fluorine (F) generated while cleaning the chamber; forming a metal catalyst layer for crystallization, on the a-Si layer; and crystallizing the a-Si layer into a poly-Si layer by performing a thermal processing operation.Type: GrantFiled: May 31, 2012Date of Patent: September 23, 2014Assignee: Samsung Display Co., Ltd.Inventors: Jong-Ryuk Park, Yun-Mo Chung, Tak-Young Lee, Kil-Won Lee
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Patent number: 8790967Abstract: A method of fabricating a polycrystalline silicon layer includes: forming an amorphous silicon layer on a substrate; crystallizing the amorphous silicon layer into a polycrystalline silicon layer using a crystallization-inducing metal; forming a metal layer pattern or metal silicide layer pattern in contact with an upper or lower region of the polycrystalline silicon layer corresponding to a region excluding a channel region in the polycrystalline silicon layer; and annealing the substrate to getter the crystallization-inducing metal existing in the channel region of the polycrystalline silicon layer to the region in the polycrystalline silicon layer having the metal layer pattern or metal silicide layer pattern. Accordingly, the crystallization-inducing metal existing in the channel region of the polycrystalline silicon layer can be effectively removed, and thus a thin film transistor having an improved leakage current characteristic and an OLED display device including the same can be fabricated.Type: GrantFiled: May 4, 2012Date of Patent: July 29, 2014Assignee: Samsung Display Co., Ltd.Inventors: Byoung-Keon Park, Jin-Wook Seo, Tae-Hoon Yang, Kil-Won Lee, Ki-Yong Lee
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Patent number: 8771420Abstract: A substrate processing apparatus that forms thin films on a plurality of substrates and thermally processes the substrates, by uniformly heating the substrates. The substrate processing apparatus includes a processing chamber, a boat in which substrates are stacked, an external heater located outside of the processing chamber, a feeder to move the boat into and out of the processing chamber, a lower heater located below the feeder, and a central heater located in the center of the boat.Type: GrantFiled: February 26, 2010Date of Patent: July 8, 2014Assignee: Samsung Display Co., Ltd.Inventors: Heung-Yeol Na, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Jong-Won Hong, Eu-Gene Kang, Seok-Rak Chang, Yun-Mo Chung, Tae-Hoon Yang, Byung-Soo So, Byoung-Keon Park, Dong-Hyun Lee, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi, Ivan Maidanchuk, Won-Bong Baek, Jae-Wan Jung