Abstract: A data processor processes input data using fuzzy logic operations. The input data consists of n-bits (where n is a natural number greater than 2) and appears at a rate of .function.. The data processor outputs the processed data at a given number of bits and a given rate. The data processor includes a first converter (10), a fuzzy computing element (20), and a second converter (30). The first converter converts the input data into converted data consisting of m bits (where m is a natural number less than n and appearing at a rate of (2.sup.n-m).function.. The fuzzy computing element performs fuzzy logic operations on the converted data and sends the processed data to the second converter. The second converter converts the process converts the process data into output data at the given rate and with the given number of bits.

Abstract: An asynchronous ripple counter counts from a predetermined binary value to zero in response to an input clock signal. Zero detection logic is coupled to the ripple counter for detecting, from a most significant bit to a least significant bit of the ripple counter, when the counter has counted to zero. Both the counter and the zero detection logic receive and store the predetermined binary value. The monitoring of the ripple counter's digits from MSB to LSB prevents false detections of zero states in the ripple counter and allows the ripple counter to be extended to an arbitrarily large number of bits without sacrificing the maximum input clock frequency.