Patents by Inventor Kim Hyun Sik

Kim Hyun Sik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Shallow low energy ion implantation into pad oxide for improving threshold voltage stability
    Patent number: 7259072
    Abstract: A method is described to fabricate a MOSFET device with increased threshold voltage stability. After the pad oxide and pad nitride are deposited on the silicon substrate and shallow trenches are patterned and the pad nitride removed. As+ or P+ species are then implanted using low energy ions of approximately 5 keV into the pad oxide. Conventional As+ or P+ implant follows the shallow implant to form the n-wells. With this procedure of forming a sacrificial shallow implantation oxide layer, surface dopant concentration variation at pad oxide:silicon substrate interface is minimized; and threshold voltage stability variation of the device is significantly decreased.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: August 21, 2007
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Yisuo Li, Francis Benistant, Kim Hyun Sik, Zhao Lun