Abstract: A high bandwidth semiconductor printed circuit board assembly (PCBA) providing a layer of dielectric substrate containing plated vias with an upper and lower surface plated with etched copper, mated with a second layer of etched copper plated dielectric containing plated vias that is placed on the top surface of the first layer. A third layer of etched copper plated dielectric containing plated vias may be placed on the bottom layer of etched copper foil. A base layer of etched copper plated thick dielectric containing plated vias is laminated simultaneously with the preceding layers to provide the high bandwidth digital and RF section of the assembly.

Abstract: A circuitized substrate assembly comprised of at least two circuitized substrates each including a thin dielectric layer and a conductive layer with a plurality of conductive members as part thereof, the conductive members of each substrate being electrically coupled to the conductive sites of a semiconductor chip. A dielectric layer is positioned between both substrates and the substrates are bonded together, such that the chips are internally located within the assembly and oriented in a stacked orientation. A method of making such an assembly is also provided, as is an electrical assembly utilizing same and an information handling system adapted for having such an electrical assembly as part thereof.

Abstract: A circuitized substrate assembly comprised of at least two circuitized substrates each including a thin dielectric layer and a conductive layer with a plurality of conductive members as part thereof, the conductive members of each substrate being electrically coupled to the conductive sites of a semiconductor chip. A dielectric layer is positioned between both substrates and the substrates are bonded together, such that the chips are internally located within the assembly and oriented in a stacked orientation. A method of making such an assembly is also provided, as is an electrical assembly utilizing same and an information handling system adapted for having such an electrical assembly as part thereof.

Abstract: A method and structure for forming an electronic structure that comprises a redistribution structure on a circuitized substrate. The redistribution structure includes N dielectric layers (N?2) and N metal planes formed in the following sequence: dielectric layer 1 on a metallic plane that exists on a surface of the substrate, metal plane 1 on dielectric layer 1, dielectric layer 2 on dielectric layer 1 and metal plane 1, metal plane 2 on the dielectric layer 2, . . . , dielectric layer N on dielectric layer N?1 and metal plane N?1, and metal plane N on the dielectric layer N. Metal planes or metallic planes may include signal planes, power planes, ground planes, etc. A microvia structure, which is formed through the N dielectric layers and electrically couples metal plane N to the metallic plane, includes a microvia or a portion of a microvia through each dielectric layer.

Abstract: A method and structure for forming an electronic structure that comprises a redistribution structure on a circuitized substrate. The redistribution structure includes N dielectric layers (N ?2) and N metal planes formed in the following sequence: dielectric layer 1 on a metallic plane that exists on a surface of the substrate, metal plane 1 on dielectric layer 1, dielectric layer 2 on dielectric layer 1 and metal plane 1, metal plane 2 on the dielectric layer 2, . . . , dielectric layer N on dielectric layer N-1 and metal plane N-1, and metal plane N on the dielectric layer N. Metal planes or metallic planes may include signal planes, power planes, ground planes, etc. A microvia structure, which is formed through the N dielectric layers and electrically couples metal plane N to the metallic plane, includes a microvia or a portion of a microvia through each dielectric layer.

Abstract: An electronic structure and associated method of formation. A laminate is solderably coupled to an electronic carrier. A stiffener is adhesively attached to a portion of a surface of the laminate by a stiffener adhesive that is in physically adhesive contact with a portion of a first surface of the stiffener and with the portion of the surface of the laminate. A thermal lid is adhesively attached to a portion of a second surface of the stiffener by a lid adhesive that is in physically adhesive contact with a portion of a surface of the lid and with a portion of the second surface of the stiffener. A void region is disposed between the surface of the thermal lid and the surface of the laminate.

Abstract: A multilayered laminate, substructures and associated methods of fabrication are presented. The multilayered laminate includes in sequential order: (a) a first intermediate layer having microvias and conductive lands; (b) a plurality of signal/power plane substructures, wherein a dielectric material of an intervening dielectric layer insulatively separates each pair of successive signal/power plane substructures and (c) a second intermediate layer having microvias and conductive lands.

Abstract: A method and structure for forming an electronic structure that comprises a redistribution structure on a circuitized substrate. The redistribution structure includes N dielectric layers ( N >2) and N metal planes formed in the following sequence: dielectric layer 1 on a metallic plane that exists on a surface of the substrate, metal plane 1 on dielectric layer 1, dielectric layer 2 on dielectric layer 1 and metal plane 1, metal plane 2 on the dielectric layer 2, . . . , dielectric layer N on dielectric layer N-1 and metal plane N-1, and metal plane N on the dielectric layer N. Metal planes or metallic planes may include signal planes, power planes, ground planes, etc. A microvia structure, which is formed through the N dielectric layers and electrically couples metal plane N to the metallic plane, includes a microvia or a portion of a microvia through each dielectric layer.

Abstract: A multilayered laminate, substructures and associated methods of fabrication are presented. The multilayered laminate includes in sequential order: (a) a first intermediate layer having microvias and conductive lands; (b) a plurality of signal/power plane substructures, wherein a dielectric material of an intervening dielectric layer insulatively separates each pair of successive signal/power plane substructures and (c) a second intermediate layer having microvias and conductive lands.

Abstract: A method for attaching adherent metal components, particularly a copper film, on at least one surface of a polyimide substrate is provided. The method comprises the steps of: exposing at least one surface of the polyimide substrate to a reactive gas plasma that provides a level of ion bombardment of the polyimide surface sufficient to disrupt at least a portion of the imide groups on the surface and to form reactive carboxylate groups, carbonyl groups and other carbon-oxygen functional groups on the surface; and then depositing a metal film onto the chemically-modified surface without intervening exposure to air. The present invention also provides a copper-coated polyimide product comprising a polyimide substrate having a substantially smooth and chemically-modified surface and a copper film directly attached to the surface, i.e., the product is free of a polymeric adhesive layer or tie coat between the surface of the polyimide substrate and the copper film.

Abstract: A method for attaching adherent metal components, particularly a copper film, on at least one surface of a polyimide substrate is provided. The method comprises the steps of: exposing at least one surface of the polyimide substrate to a reactive gas plasma that provides a level of ion bombardment of the polyimide surface sufficient to disrupt at least a portion of the imide groups on the surface and to form reactive carboxylate groups, carbonyl groups and other carbon-oxygen functional groups on the surface; and then depositing a metal film onto the chemically-modified surface without intervening exposure to air. The present invention also provides a copper-coated polyimide product comprising a polyimide substrate having a substantially smooth and chemically-modified surface and a copper film directly attached to the surface, i.e., the product is free of a polymeric adhesive layer or tie coat between the surface of the polyimide substrate and the copper film.

Abstract: A method for vapor phase depositing a thin seed layer of, for example, chromium and copper onto the side walls of through holes in thin film substrates of, for example, polyimide is disclosed. This method is useful in fabricating devices such as a thin film semiconductor chip carrier in which a semiconductor chip mounted on one major surface of the chip carrier is electrically connected to a ground plane and/or a power conductor on the other major surface of the chip carrier via one or more metallized through holes.

Abstract: The adhesion of chromium-copper layer to polyimide has been greatly improved by a method which provides controlled reduction, rather than total elimination, of water content in the polyimide. The electronic packaging device which incorporates the flexible circuit prepared by the method exhibits greatly improved reliability. It is believed that the invention can be used to improve the adhesion between other organic materials having moisture affinity and materials comprising in-organics or between two organic materials.

Abstract: A copper layer is coated onto an organic polymeric substrate in the presence of a gas containing nitrogen and a noble gas.

Abstract: A method for vapor phase depositing a thin seed layer of, for example, chromium and copper onto the side walls of through holes in thin film substrates of, for example, polyimide is disclosed. This method is useful in fabricating devices such as a thin film semiconductor chip carrier in which a semiconductor chip mounted on one major surface of the chip carrier is electrically connected to a ground plane and/or a power conductor on the other major surface of the chip carrier via one or more metallized through holes.

Abstract: A system for vacuum depositing a material onto a sample having a surface recess, such as a hole or channel, therein. The system includes a vacuum chamber capable of attaining a high vacuum and a vacuum deposition source in the chamber for emitting atoms. An energy source is connected to the vacuum deposition source to initiate emission of the atoms therefrom. A sample having an upper surface disposed in the vacuum chamber opposite the vacuum deposition source is adapted to receive the atoms emitted from the vacuum deposition source. The sample has a surface recess therein with a wall substantially perpendicular to the plane of the sample. Finally, a component for eliminating undesirable depositing angles of atoms is disposed intermediate the vacuum deposition source and the sample in order to improve the ratio of recess wall to sample surface deposition.