Patents by Inventor Kim-Kwong Michael Han

Kim-Kwong Michael Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7095076
    Abstract: A method, apparatus, and system in which an embedded memory comprises one or more electrically-alterable non-volatile memory cells that include a coupling capacitor, a read transistor, and a tunneling capacitor. The coupling capacitor has a first gate composed of both N+ doped material and P+ doped material, and a P+ doped region abutted to a N+ doped region. The P+ doped region abutted to the N+ doped region surrounds the first gate. The read transistor has a second gate. The tunneling capacitor has a third gate composed of both N+ doped material and P+ doped material.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: August 22, 2006
    Assignee: Virage Logic Corporation
    Inventors: Kim-Kwong Michael Han, Narbeh Derhacobian, Jaroslav Raszka
  • Patent number: 6788574
    Abstract: A method, apparatus, and system in which an embedded memory comprises one or more electrically-alterable non-volatile memory cells that include a coupling capacitor, a read transistor, and a tunneling capacitor. The coupling capacitor has a first gate composed of both N+ doped material and P+ doped material, and a P+ doped region abutted to a N+ doped region. The P+ doped region abutted to the N+ doped region surrounds the first gate. The read transistor has a second gate. The tunneling capacitor has a third gate composed of both N+ doped material and P+ doped material.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: September 7, 2004
    Assignee: Virage Logic Corporation
    Inventors: Kim-Kwong Michael Han, Narbeh Derhacobian, Jaroslav Raszka