Patents by Inventor Kim Lee Bock

Kim Lee Bock has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230411340
    Abstract: A semiconductor device includes a signal carrier medium such as a PCB substrate having first and second opposed surfaces and a cavity formed in the second surface. A first set of one or more semiconductor dies are mounted on the first surface, and a second set of one or more semiconductor dies are mounted within the cavity. The first and/or second sets of semiconductor dies may be memory dies.
    Type: Application
    Filed: May 17, 2022
    Publication date: December 21, 2023
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Lee Kong Yu, Yoong Tatt Chin, Kim Lee Bock, Paramjeet Gill, Wei Chiat Teng, Chong Un Tan
  • Publication number: 20230137512
    Abstract: A semiconductor memory device, also referred to as a solid state drive, includes thermally conductive components such as a conductive coating to draw heat away from the semiconductive package. The coating may also be electrically conductive to provide shielding from and absorption of electromagnetic interference. In examples, a semiconductor device including a substrate may be affixed to an edge connector printed circuit board with solder balls to form a solid state drive. In further examples, the substrate may be omitted, and semiconductor memory dies, a controller die and other electronic components may be directly surface mounted to an edge connector printed circuit board to form a solid state drive.
    Type: Application
    Filed: November 3, 2021
    Publication date: May 4, 2023
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Hui Xu, Kim Lee Bock, Rama Shukla, Chong Un Tan, Yoong Tatt Chin, Shrikar Bhagath
  • Patent number: 11177241
    Abstract: A semiconductor device is disclosed including a die stack including a number of dies aligned with each other with respect to an axis, and a top die that is offset along the axis the to prevent die cracking.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: November 16, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Junrong Yan, Jianming Zhang, Min Zhao, Kailei Zhang, Chee Keong Chin, Kim Lee Bock
  • Publication number: 20200381401
    Abstract: A semiconductor device is disclosed including a die stack including a number of dies aligned with each other with respect to an axis, and a top die that is offset along the axis the to prevent die cracking.
    Type: Application
    Filed: March 10, 2020
    Publication date: December 3, 2020
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Junrong Yan, Jianming Zhang, Min Zhao, Kailei Zhang, Chee Keong Chin, Kim Lee Bock
  • Patent number: 10418334
    Abstract: A semiconductor die is disclosed including corner recesses to prevent cracking of the semiconductor die during fabrication. Prior to dicing the semiconductor die from the wafer, recesses may be formed in the wafer at corners between any pair of semiconductor die. The recesses may be formed by a laser or photolithographic processes in the kerf area between semiconductor die. Once formed, the corner recesses prevent cracking and damage to semiconductor die which could otherwise occur at the corners of adjacent semiconductor die as the adjacent semiconductor die move relative to each other during the backgrind process.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: September 17, 2019
    Assignee: SanDisk Semiconductor (Shanghai) Co. Ltd.
    Inventors: Hang Zhang, Weili Wang, Junrong Yan, Kim Lee Bock, Chee Keong Chin, Chong Un Tan, Xin Tian
  • Patent number: 10283485
    Abstract: A semiconductor device is disclosed including semiconductor die stacked in a stepped, offset configuration, where die bond pads of semiconductor die on different levels are interconnected using one or more conductive bumps.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: May 7, 2019
    Assignee: SanDisk Semiconductor (Shanghai) Co. Ltd.
    Inventors: Junrong Yan, Xiaofeng Di, Chee Keong Chin, Kim Lee Bock, Mingxia Wu
  • Publication number: 20180337161
    Abstract: A semiconductor device is disclosed including semiconductor die stacked in a stepped, offset configuration, where die bond pads of semiconductor die on different levels are interconnected using one or more conductive bumps.
    Type: Application
    Filed: June 8, 2017
    Publication date: November 22, 2018
    Applicant: SANDISK SEMICONDUCTOR (SHANGHAI) CO., LTD.
    Inventors: Junrong Yan, Xiaofeng Di, Chee Keong Chin, Kim Lee Bock, Mingxia Wu
  • Patent number: 10128218
    Abstract: A semiconductor device is disclosed that is formed with die bond pads at an edge of the semiconductor die. The die bond pads may be formed partially in a kerf area between semiconductor die on a wafer. When the wafer is diced, the die bond pads are severed along their length, leaving a portion of the die bond pads exposed at an edge of the diced semiconductor die. Having die bond pads at the edge of the die minimizes the offset between die when stacked into a package.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: November 13, 2018
    Assignee: SanDisk Semiconductor (Shanghai) Co. Ltd.
    Inventors: Junrong Yan, Chee Keong Chin, Chong Un Tan, Ming Xia Wu, Kim Lee Bock, Shrikar Bhagath
  • Publication number: 20180174983
    Abstract: A semiconductor die is disclosed including corner recesses to prevent cracking of the semiconductor die during fabrication. Prior to dicing the semiconductor die from the wafer, recesses may be formed in the wafer at corners between any pair of semiconductor die. The recesses may be formed by a laser or photolithographic processes in the kerf area between semiconductor die. Once formed, the corner recesses prevent cracking and damage to semiconductor die which could otherwise occur at the corners of adjacent semiconductor die as the adjacent semiconductor die move relative to each other during the backgrind process.
    Type: Application
    Filed: June 22, 2017
    Publication date: June 21, 2018
    Applicant: SANDISK SEMICONDUCTOR (SHANGHAI) CO., LTD.
    Inventors: Hang Zhang, Weili Wang, Junrong Yan, Kim Lee Bock, Chee Keong Chin, Chong Un Tan, Xin Tian
  • Publication number: 20180175006
    Abstract: A semiconductor device is disclosed that is formed with die bond pads at an edge of the semiconductor die. The die bond pads may be formed partially in a kerf area between semiconductor die on a wafer. When the wafer is diced, the die bond pads are severed along their length, leaving a portion of the die bond pads exposed at an edge of the diced semiconductor die. Having die bond pads at the edge of the die minimizes the offset between die when stacked into a package.
    Type: Application
    Filed: June 22, 2017
    Publication date: June 21, 2018
    Applicant: SANDISK SEMICONDUCTOR (SHANGHAI) CO., LTD.
    Inventors: Junrong Yan, Chee Keong Chin, Chong Un Tan, Ming Xia Wu, Kim Lee Bock, Shrikar Bhagath
  • Patent number: 9773766
    Abstract: A semiconductor package including a plurality of stacked semiconductor die, and methods of forming the semiconductor package, are disclosed. In order to ease wirebonding requirements on the controller die, the controller die may be mounted directly to the substrate in a flip chip arrangement requiring no wire bonds or footprint outside of the controller die. Thereafter, a spacer layer may be affixed to the substrate around the controller die to provide a level surface on which to mount one or more flash memory die. The spacer layer may be provided in a variety of different configurations.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: September 26, 2017
    Assignees: SanDisk Information Technology (Shanghai) Co., Ltd., SanDisk Semiconductor (Shanghai) Co. Ltd.
    Inventors: Ning Ye, Chin-Tien Chiu, Suresh Upadhyayula, Peng Fu, Zhong Lu, Cheeman Yu, Yuang Zhang, Li Wang, Pradeep Kumar Rai, Weili Wang, Enyong Tai, King Hoo Ong, Kim Lee Bock
  • Publication number: 20150221624
    Abstract: A semiconductor package including a plurality of stacked semiconductor die, and methods of forming the semiconductor package, are disclosed. In order to ease wirebonding requirements on the controller die, the controller die may be mounted directly to the substrate in a flip chip arrangement requiring no wire bonds or footprint outside of the controller die. Thereafter, a spacer layer may be affixed to the substrate around the controller die to provide a level surface on which to mount one or more flash memory die. The spacer layer may be provided in a variety of different configurations.
    Type: Application
    Filed: January 9, 2013
    Publication date: August 6, 2015
    Applicants: SANDISK SEMICONDUCTOR (SHANGHAI) CO., LTD., SANDISK INFORMATION TECHNOLOGY (SHANGHAI) CO., LTD.
    Inventors: Ning Ye, Chin-Tien Chiu, Suresh Upadhyayula, Peng Fu, Zhong Lu, Cheeman Yu, Yuang Zhang, Li Wang, Pradeep Kumar Rai, Weili Wang, Enyong Tai, King Hoo Ong, Kim Lee Bock
  • Patent number: 9038264
    Abstract: A tool is disclosed for separating a semiconductor die from a tape to which the die is affixed during the wafer dicing process. The tool includes a pick-up arm for positioning a vacuum tip over a semiconductor die to be removed. The vacuum tip includes a non-uniform array of vacuum holes to grip the semiconductor wafer.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: May 26, 2015
    Assignees: SanDisk Semiconductor (Shanghai) Co., Ltd., SanDisk Information Technology (Shanghai) Co., Ltd.
    Inventors: Pradeep Kumar Rai, Kim Lee Bock, Li Wang, JinXiang Huang, EnYong Tai, JianHua Wang, King Hoo Ong