Abstract: An image sensor is provided. The image sensor includes a substrate having a plurality of cell regions, photodiodes formed in the cell regions of the substrate an antireflection layer, a color filter layer, a planarization layer, and a plurality of microlenses. The antireflection layer is formed above the substrate including the photodiodes and incorporates at least two insulating layers with different refractive indexes. The color filter layer is formed on the antireflection layer and corresponds to the photodiodes of the cell regions. The planarization layer is formed on the color filter layer. The plurality of microlenses is formed on the planarization layer and correspond to the photodiodes of the cell regions.

Abstract: Provided are a CMOS image sensor and a manufacturing method thereof. The CMOS image sensor incorporates an interlayer insulating layer, a color filter layer, a first planarizing layer, and at least one microlens. The interlayer insulating layer is formed on a semiconductor substrate having at least one photodiode. The color filter layer is formed above the interlayer insulating layer and incorporates at least one color filter. The first planarizing layer is formed on the color filter layer, and has a uniform surface tension from being UV radiated after a hardening process. The at least one microlens is formed on the first planarizing layer to correspond to the at least one photodiode.

Abstract: A method is described to fabricate a MOSFET device with increased threshold voltage stability. After the pad oxide and pad nitride are deposited on the silicon substrate and shallow trenches are patterned and the pad nitride removed. As+ or P+ species are then implanted using low energy ions of approximately 5 keV into the pad oxide. Conventional As+ or P+ implant follows the shallow implant to form the n-wells. With this procedure of forming a sacrificial shallow implantation oxide layer, surface dopant concentration variation at pad oxide:silicon substrate interface is minimized; and threshold voltage stability variation of the device is significantly decreased.