Patents by Inventor Kim Y. Lee

Kim Y. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10310182
    Abstract: The embodiments disclose a stack feature of a stack configured to confine optical fields within and to a patterned plasmonic underlayer in the stack configured to guide light from a light source to regulate optical coupling.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: June 4, 2019
    Assignee: Seagate Technology LLC
    Inventors: Ganping Ju, Chubing Peng, Xiaobin Zhu, Yingguo Peng, Yukiko Kubota, Timothy J Klemmer, Jan-Ulrich Thiele, Michael A. Seigler, Werner Scholz, Kim Y. Lee, David S. Kuo, Koichi Wago
  • Patent number: 10151978
    Abstract: Provided herein is a method, including creating a first layer over a substrate, wherein the first layer is configured for directed self-assembly of a block copolymer thereover; creating a continuous second layer over the first layer by directed self-assembly of a block copolymer, wherein the second layer is also configured for directed self-assembly of a block copolymer thereover; and creating a third layer over the continuous second layer by directed self-assembly of a block copolymer. Also provided is an apparatus, comprising a continuous first layer comprising a thin film of a first, phase-separated block copolymer, wherein the first layer comprises a first chemoepitaxial template configured for directed self-assembly of a block copolymer thereon; and a second layer on the first layer, wherein the second layer comprises a thin film of a second, phase-separated block copolymer.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: December 11, 2018
    Assignee: Seagate Technology LLC
    Inventors: XiaoMin Yang, Shuaigang Xiao, Kim Y. Lee, David S. Kuo
  • Patent number: 9964855
    Abstract: A method is disclosed that includes forming at least one substrate alignment mark and at least one lithography alignment mark in a substrate; forming a seed layer on the substrate; and forming a guide pattern and at least one guide pattern alignment mark in the seed layer, where the at least one guide pattern alignment mark is formed over the at least one substrate alignment mark. The method further includes determining an alignment error of the at least one guide pattern alignment mark relative to the at least one substrate alignment mark; and patterning features on at least one region of the substrate, where the features are positioned on the substrate based on the at least one lithography alignment mark and the alignment error.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: May 8, 2018
    Assignee: Seagate Technology LLC
    Inventors: HongYing Wang, Kim Y. Lee, Yautzong Hsu, Nobuo Kurataka, Gennady Gauzner, Shuaigang Xiao
  • Patent number: 9934806
    Abstract: Provided herein is a method, including creating a first pattern in a data region of a substrate, and creating a second pattern in a servo region of a substrate. A circumferential line pattern is created overlapping the first pattern to create rectangle-shaped protrusions in the data region of the substrate. A chevron pattern is created overlapping the second pattern to create chevron-derived protrusions in the servo region of the substrate.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: April 3, 2018
    Assignee: Seagate Technology LLC
    Inventors: Shuaigang Xiao, David S. Kuo, XiaoMin Yang, Kim Y. Lee, Yautzong Hsu, Koichi Wago
  • Patent number: 9837274
    Abstract: Provided is an apparatus that includes a substrate; a first hard-mask pattern that includes a number of first features disposed over a top surface of the substrate; and a second hard-mask pattern disposed over the first hard-mask layer. The second hard-mask pattern includes a number of second features overlapping one or more of the first features.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: December 5, 2017
    Assignee: Seagate Technology LLC
    Inventors: XiaoMin Yang, Shuaigang Xiao, Yautzong Hsu, Zhaoning Yu, Kim Y. Lee, David S. Kuo
  • Publication number: 20170307976
    Abstract: Provided herein is a method, including creating a first layer over a substrate, wherein the first layer is configured for directed self-assembly of a block copolymer thereover; creating a continuous second layer over the first layer by directed self-assembly of a block copolymer, wherein the second layer is also configured for directed self-assembly of a block copolymer thereover; and creating a third layer over the continuous second layer by directed self-assembly of a block copolymer. Also provided is an apparatus, comprising a continuous first layer comprising a thin film of a first, phase-separated block copolymer, wherein the first layer comprises a first chemoepitaxial template configured for directed self-assembly of a block copolymer thereon; and a second layer on the first layer, wherein the second layer comprises a thin film of a second, phase-separated block copolymer.
    Type: Application
    Filed: November 18, 2014
    Publication date: October 26, 2017
    Inventors: XiaoMin YANG, Shuaigang XIAO, Kim Y. LEE, David S. KUO
  • Patent number: 9797924
    Abstract: Provided herein in an apparatus, including a substrate; a functional layer, wherein the functional layer has a composition characteristic of a workpiece of an analytical apparatus; and pre-determined features configured to calibrate the analytical apparatus. Also provided herein is an apparatus, including a functional layer overlying a substrate; and pre-determined features for calibration of an analytical apparatus configured to measure the surface of a workpiece, wherein the functional layer has a composition similar to the workpiece.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: October 24, 2017
    Assignee: Seagate Technology LLC
    Inventors: Gennady Gauzner, Zhaoning Yu, Nobuo Kurataka, David S. Kuo, Kim Y Lee, Yautzong Hsu, Hong Ying Wang
  • Patent number: 9773520
    Abstract: The embodiments disclose a method of using a trimmed imprinted resist and chemical contrast pattern to guide a directed self-assembly (DSA) of a predetermined lamellar block copolymer (BCP), creating chromium (Cr) lamellar guiding lines using the BCP and DSA in a dry Cr lift-off process and etching the Cr lamellar guiding line patterns into a substrate to fabricate the imprint template.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: September 26, 2017
    Assignee: Seagate Technology LLC
    Inventors: XiaoMin Yang, Shuaigang Xiao, Yautzong Hsu, HongYing Wang, Kim Y. Lee
  • Patent number: 9683295
    Abstract: Provided herein is an apparatus, including a substrate; an etch stop layer overlying the substrate, wherein the etch stop layer is substantially resistant to etching conditions; and a patterned layer overlying the etch stop layer, wherein the patterned layer is substantially labile to the etching conditions, and wherein the patterned layer comprises a number of features including substantially consistent feature profiles among regions of high feature density and regions of low feature density.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: June 20, 2017
    Assignee: Seagate Technology LLC
    Inventors: Michael R. Feldbaum, Koichi Wago, Gennady Gauzner, Kim Y. Lee, David S. Kuo
  • Publication number: 20170125049
    Abstract: Provided herein is a method, including creating a first pattern in a data region of a substrate, and creating a second pattern in a servo region of a substrate. A circumferential line pattern is created overlapping the first pattern to create rectangle-shaped protrusions in the data region of the substrate. A chevron pattern is created overlapping the second pattern to create chevron-derived protrusions in the servo region of the substrate.
    Type: Application
    Filed: January 10, 2017
    Publication date: May 4, 2017
    Inventors: Shuaigang Xiao, David S. Kuo, XiaoMin Yang, Kim Y. Lee, Yautzong Hsu, Koichi Wago
  • Patent number: 9620161
    Abstract: Provided herein is an apparatus, including a first region of a substrate corresponding to a data region in a patterned recording medium; a first set of protrusions etched out of the first region of the substrate, wherein the protrusions of the first set of protrusions are rectangle shaped; a second region of the substrate corresponding to a servo region in a patterned recording medium; and a second set of protrusions etched out of the second region of the substrate, wherein the second set of protrusions includes radial lines etched into the substrate across chevrons etched out of the substrate.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: April 11, 2017
    Assignee: Seagate Technology LLC
    Inventors: Shuaigang Xiao, David S. Kuo, XiaoMin Yang, Kim Y. Lee, Yautzong Hsu, Koichi Wago
  • Patent number: 9605348
    Abstract: Provided herein is an apparatus, including a substrate; an etch stop layer overlying the substrate, wherein the etch stop layer is substantially resistant to etching conditions; and a patterned layer overlying the etch stop layer, wherein the patterned layer is substantially labile to the etching conditions, and wherein the patterned layer comprises a number of features including substantially consistent feature profiles among regions of high feature density and regions of low feature density.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: March 28, 2017
    Assignee: Seagate Technology LLC
    Inventors: Michael R. Feldbaum, Koichi Wago, Gennady Gauzner, Kim Y. Lee, David S. Kuo
  • Publication number: 20170023866
    Abstract: A method is disclosed that includes forming at least one substrate alignment mark and at least one lithography alignment mark in a substrate; forming a seed layer on the substrate; and forming a guide pattern and at least one guide pattern alignment mark in the seed layer, where the at least one guide pattern alignment mark is formed over the at least one substrate alignment mark. The method further includes determining an alignment error of the at least one guide pattern alignment mark relative to the at least one substrate alignment mark; and patterning features on at least one region of the substrate, where the features are positioned on the substrate based on the at least one lithography alignment mark and the alignment error.
    Type: Application
    Filed: October 10, 2016
    Publication date: January 26, 2017
    Inventors: HongYing Wang, Kim Y. Lee, Yautzong Hsu, Nobuo Kurataka, Gennady Gauzner, Shuaigang Xiao
  • Publication number: 20170025140
    Abstract: Provided herein is an apparatus, including a first region of a substrate corresponding to a data region in a patterned recording medium; a first set of protrusions etched out of the first region of the substrate, wherein the protrusions of the first set of protrusions are rectangle shaped; a second region of the substrate corresponding to a servo region in a patterned recording medium; and a second set of protrusions etched out of the second region of the substrate, wherein the second set of protrusions includes radial lines etched into the substrate across chevrons etched out of the substrate.
    Type: Application
    Filed: April 16, 2015
    Publication date: January 26, 2017
    Applicant: Seagate Technology LLC
    Inventors: Shuaigang Xiao, David S. Kuo, XiaoMin Yang, Kim Y. Lee, Yautzong Hsu, David Koichi
  • Publication number: 20170025141
    Abstract: The embodiments disclose a method including patterning a template substrate to have different densities using hierarchical block copolymer density patterns in different zones including a first pattern and a second pattern, using a first directed self-assembly to pattern a first zone in the substrate using a first block copolymer material, and using a second directed self-assembly to pattern a second zone in the substrate using a second block copolymer material.
    Type: Application
    Filed: October 10, 2016
    Publication date: January 26, 2017
    Inventors: XiaoMin Yang, Shuaigang Xiao, Kim Y. Lee, Koichi Wago, Philip Steiner
  • Patent number: 9489974
    Abstract: The embodiments disclose a method including patterning a template substrate to have different densities using hierarchical block copolymer density patterns in different zones including a first pattern and a second pattern, using a first directed self-assembly to pattern a first zone in the substrate using a first block copolymer material, and using a second directed self-assembly to pattern a second zone in the substrate using a second block copolymer material.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: November 8, 2016
    Assignee: Seagate Technology LLC
    Inventors: XiaoMin Yang, Shuaigang Xiao, Kim Y. Lee, Koichi Wago, Philip Steiner
  • Patent number: 9466325
    Abstract: Provided herein are apparatuses and methods related to creating a patterned resist layer on a substrate; selectively treating at least a resist-contacting layer of the substrate in contact with the patterned resist layer to create a patterned growth guiding mechanism and growing patterned magnetic features guided by the patterned growth guiding mechanism.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: October 11, 2016
    Assignee: Seagate Technology LLC
    Inventors: Thomas P. Nolan, Kim Y. Lee, Shuaigang Xiao, Tom Chang, Yingguo Peng
  • Patent number: 9466324
    Abstract: A method is disclosed that includes forming at least one substrate alignment mark and at least one lithography alignment mark in a substrate; forming a seed layer on the substrate; and forming a guide pattern and at least one guide pattern alignment mark in the seed layer, where the at least one guide pattern alignment mark is formed over the at least one substrate alignment mark. The method further includes determining an alignment error of the at least one guide pattern alignment mark relative to the at least one substrate alignment mark; and patterning features on at least one region of the substrate, where the features are positioned on the substrate based on the at least one lithography alignment mark and the alignment error.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: October 11, 2016
    Assignee: Seagate Technology LLC
    Inventors: HongYing Wang, Kim Y Lee, Yautzong Hsu, Nobuo Kurataka, Gennady Gauzner, Shuaigang Xiao
  • Patent number: 9460747
    Abstract: A method for nano-patterning includes imprinting features in a resist with an imprint mold to form one or more topographic surface patterns on the imprinted resist. A block copolymer (“BCP”) material is deposited on the imprinted resist, wherein a molecular dimension L0 of the BCP material correlates by an integer multiple to a spacing dimension of the one or more topographic surface patterns on the imprinted resist. The deposited BCP is annealed and at least a portion of the annealed BCP is removed, forming a template having discrete domains.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: October 4, 2016
    Assignee: Seagate Technology LLC
    Inventors: Yuan Xu, Kim Y. Lee, David S. Kuo, Koichi Wago, Wei Hu
  • Publication number: 20160265119
    Abstract: Provided herein is an apparatus, including a substrate; an etch stop layer overlying the substrate, wherein the etch stop layer is substantially resistant to etching conditions; and a patterned layer overlying the etch stop layer, wherein the patterned layer is substantially labile to the etching conditions, and wherein the patterned layer comprises a number of features including substantially consistent feature profiles among regions of high feature density and regions of low feature density.
    Type: Application
    Filed: May 24, 2016
    Publication date: September 15, 2016
    Inventors: Michael R. Feldbaum, Koichi Wago, Gennady Gauzner, Kim Y. Lee, David S. Kuo