Patents by Inventor Kimberley A. Kelly
Kimberley A. Kelly has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20120233510Abstract: A chip stack structure includes a logic chip having an active device surface, and memory slices of a memory unit vertically aligned such that a surface of the memory slices is oriented perpendicular to the active device surface of the logic chip. The chip stack structure also includes wiring patterned on an upper surface of the memory slices, the wiring electrically connecting memory leads of the memory slices to logic grids corresponding to logic grid connections of the logic chip.Type: ApplicationFiled: March 9, 2011Publication date: September 13, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Evan G. Colgan, Monty M. Denneau, Kimberley A. Kelly, Sampath Purushothaman, Roy R. Yu
-
Patent number: 6678949Abstract: A structure for mounting electronic devices. The structure uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on opposing surfaces of the carrier and the thin film. In this way, solder connections can extend in the through-vias to electrically connect the thin film to the carrier and smooth out topography. In a related process for forming the structure, the thin film is built on a first sacrificial carrier and then further processed on a second sacrificial carrier to keep it from distorting, expanding, or otherwise suffering adversely during its processing. The solder connections between the thin film and the carrier are formed using a closed solder joining process. The spacer is used with laminate cards to create thermal stress release structures on portions of the cards carrying a thin film.Type: GrantFiled: June 21, 2001Date of Patent: January 20, 2004Assignee: International Business Machines CorporationInventors: Chandrika Prasad, Roy Yu, Richard L. Canull, Giulio DiGiacomo, Ajay P. Giri, Lewis S. Goldmann, Kimberley A. Kelly, Bouwe W. Leenstra, Voya R. Markovich, Eric D. Perfecto, Sampath Purushothaman, Joseph M. Sullivan
-
Patent number: 6632314Abstract: A method of making a surface planarization is provided using a separate pre-cut or precured film laminated onto a metallized surface to form planarized dielectric coating. The method comprises the steps of: (a) providing a thin film interconnect module with a polyimide adhesive laminated with a pre-cut or pre-cured polyimide lamination film on the top of the polyimide adhesive, the polyimide lamination film being covered with a glass plate; (b) applying pressure and heat in a synchronized format to ensure a uniform curing and gap filling in the thin film module metal for the adhesive layer; and (c) releasing the glass plate to expose a smooth lamination film surface.Type: GrantFiled: December 29, 1999Date of Patent: October 14, 2003Assignee: International Business Machines CorporationInventors: RongQing Yu, Kimberley A. Kelly, Chandrika Prasad, Sung Kwon Kang, Sampath Purushothaman
-
Patent number: 6455331Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.Type: GrantFiled: May 29, 2001Date of Patent: September 24, 2002Assignee: International Business Machines CorporationInventors: Roy Yu, Kamalesh S. Desai, Peter A. Franklin, Suryanarayana Kaja, Kimberley A. Kelly, Yeeling L. Lee, Arthur G. Merryman, Frank R. Morelli, Thomas A. Wassick
-
Patent number: 6448169Abstract: An apparatus for use in manufacturing a semiconductor device includes an input-output (IO) face having a plurality of IO lands, and is situated in an operating position in abutting relation with a depositor. The apparatus includes a first holding member holding the depositor in a first position; a second holding member holding the semiconductor device in the operating position. The depositor and the semiconductor device cooperate in the operating position to deposit solder ball connection structures to the IO lands. The apparatus further includes a separating member for moving at least one of the depositor and the semiconductor device from the operating position to an interim orientation. The interim orientation establishes a separation distance intermediate the depositor and the semiconductor device appropriate to disengage the solder ball connecting structures from the depositor.Type: GrantFiled: December 21, 1995Date of Patent: September 10, 2002Assignee: International Business Machines CorporationInventors: William Brearley, Laertis Economikos, Paul F. Findeis, Kimberley A. Kelly, Bouwe W. Leenstra, Arthur Gilman Merryman, Eric Daniel Perfecto, Chandrika Prasad, James Patrick Wood, Roy Yu
-
Publication number: 20010037565Abstract: A structure for mounting electronic devices. The structure uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on opposing surfaces of the carrier and the thin film. In this way, solder connections can extend in the through-vias to electrically connect the thin film to the carrier and smooth out topography. In a related process for forming the structure, the thin film is built on a first sacrificial carrier and then further processed on a second sacrificial carrier to keep it from distorting, expanding, or otherwise suffering adversely during its processing. The solder connections between the thin film and the carrier are formed using a closed solder joining process. The spacer is used with laminate cards to create thermal stress release structures on portions of the cards carrying a thin film.Type: ApplicationFiled: June 21, 2001Publication date: November 8, 2001Inventors: Chandrika Prasad, Roy Yu, Richard L. Canull, Giulio DiGiacomo, Ajay P. Giri, Lewis S. Goldmann, Kimberley A. Kelly, Bouwe W. Leenstra, Voya R. Markovich, Eric D. Perfecto, Sampath Purushothaman, Joseph M. Sullivan
-
Publication number: 20010023081Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.Type: ApplicationFiled: May 29, 2001Publication date: September 20, 2001Inventors: Roy Yu, Kamalesh S. Desal, Peter A. Franklin, Suryanatayana Kala, Kimberley A. Kelly, Yeeling L. Lee, Arthur G. Merryman, Frank R. Morelll, Thomas A. Wassick
-
Patent number: 6281452Abstract: A structure for mounting electronic devices which uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on opposing surfaces of the carrier and the thin film. In this way, solder connections can extend in the through-vias to electrically connect the thin film to the carrier and smooth out topography. In a related process for forming the structure, the thin film is built on a first sacrificial carrier and then further processed on a second sacrificial carrier to keep it from distorting, expanding, or otherwise suffering adversely during its processing. The solder connections between the thin film and the carrier are formed using a closed solder joining process. The spacer is used with laminate cards to create thermal stress release structures on portions of the cards carrying a thin film.Type: GrantFiled: December 3, 1998Date of Patent: August 28, 2001Assignee: International Business Machines CorporationInventors: Chandrika Prasad, Roy Yu, Richard L. Canull, Giulio DiGiacomo, Ajay P. Giri, Lewis S. Goldmann, Kimberley A. Kelly, Bouwe W. Leenstra, Voya R. Markovich, Eric D. Perfecto, Sampath Purushothaman, Joseph M. Sullivan
-
Patent number: 6248599Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.Type: GrantFiled: December 2, 1999Date of Patent: June 19, 2001Assignee: International Business Machines CorporationInventors: Roy Yu, Kamalesh S. Desai, Peter A. Franklin, Suryanarayana Kaja, Kimberley A. Kelly, Yeeling L. Lee, Arthur G. Merryman, Frank R. Morelli, Thomas A. Wassick
-
Patent number: 6183588Abstract: A process for fabricating and releasing a thin-film structure from a primary carrier for further processing. The thin-film structure is built on a metal interconnect disposed on a dielectric layer which, in turn, is deposited on a primary carrier. The thin-film structure and metal interconnect are released from the dielectric layer and primary carrier along a release interface defined between the metal interconnect and the dielectric film. Release is accomplished by disturbing the interface, either by laser ablation or dicing.Type: GrantFiled: December 14, 1999Date of Patent: February 6, 2001Assignee: International Business Machines CorporationInventors: Kimberley A. Kelly, Ashwani K. Malhotra, Eric D. Perfecto, Roy Yu
-
Patent number: 6149048Abstract: An apparatus for use in manufacturing a semiconductor device includes an input-output (IO) face having a plurality of IO lands, and is situated in an operating position in abutting relation with a depositor. The apparatus includes a first holding member holding the depositor in a first position; a second holding member holding the semiconductor device in the operating position. The depositor and the semiconductor device cooperate in the operating position to deposit solder ball connection structures to the IO lands. The apparatus further includes a separating member for moving at least one of the depositor and the semiconductor device from the operating position to an interim orientation. The interim orientation establishes a separation distance intermediate the depositor and the semiconductor device appropriate to disengage the solder ball connecting structures from the depositor.Type: GrantFiled: April 8, 1998Date of Patent: November 21, 2000Assignee: International Business Machines CorporationInventors: William Brearley, Laertis Economikos, Paul F. Findeis, Kimberley A. Kelly, Bouwe W. Leenstra, Arthur Gilman Merryman, Eric Daniel Perfecto, Chandrika Prasad, James Patrick Wood, Roy Yu
-
Patent number: 6143117Abstract: A process for fabricating and releasing a thin-film structure from a primary carrier for further processing. The thin-film structure is built on a metal interconnect disposed on a dielectric layer which, in turn, is deposited on a primary carrier. The thin-film structure and metal interconnect are released from the dielectric layer and primary carrier along a release interface defined between the metal interconnect and the dielectric film. Release is accomplished by disturbing the interface, either by laser ablation or dicing.Type: GrantFiled: December 14, 1999Date of Patent: November 7, 2000Assignee: International Business Machines CorporationInventors: Kimberley A. Kelly, Ashwani K. Malhotra, Eric D. Perfecto, Roy Yu
-
Patent number: 6099935Abstract: An apparatus for use in manufacturing a semiconductor device having input-output (IO) lands arranged in an IO array on an IO face includes a body having a plurality of cavities extending from an operating face into the body; the cavities are arranged in a cavity loci array which is in registeration with the IO lands when the apparatus is in a manufacturing position with the operating face generally adjacent the IO face. Each cavity has a depth and a lateral expanse which cooperate to establish a volume defined by a cavity bottom and at least one cavity wall. The volume accommodates an appropriate amount of solder material to establish a measure of the solder material on a facing IO land when the apparatus is in the manufacturing position.Type: GrantFiled: December 15, 1995Date of Patent: August 8, 2000Assignee: International Business Machines CorporationInventors: William Brearley, Laertis Economikos, Paul F. Findeis, Kimberley A. Kelly, Bouwe W. Leenstra, Arthur Gilman Merryman, Eric Daniel Perfecto, Chandrika Prasad, James Patrick Wood, Roy Yu
-
Patent number: 6048741Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.Type: GrantFiled: October 31, 1997Date of Patent: April 11, 2000Assignee: International Business Machines CorporationInventors: Roy Yu, Kamalesh S. Desai, Peter A. Franklin, Suryanarayana Kaja, Kimberley A. Kelly, Yeeling L. Lee, Arthur G. Merryman, Frank R. Morelli, Thomas A. Wassick
-
Patent number: 6036809Abstract: A process for fabricating and releasing a thin-film structure from a primary carrier for further processing. The thin-film structure is built on a metal interconnect disposed on a dielectric layer which, in turn, is deposited on a primary carrier. The thin-film structure and metal interconnect are released from the dielectric layer and primary carrier along a release interface defined between the metal interconnect and the dielectric film. Release is accomplished by disturbing the interface, either by laser ablation or dicing.Type: GrantFiled: February 16, 1999Date of Patent: March 14, 2000Assignee: International Business Machines CorporationInventors: Kimberley A. Kelly, Ashwani K. Malhotra, Eric D. Perfecto, Roy Yu