Abstract: Techniques are provided for fabricating a flexible electrical interconnect. A methodology implementing the techniques according to an embodiment includes performing additive manufacturing to fabricate a chain comprising a plurality of link structures. Each link structure is shaped in a continuous and seamless loop and is coupled to at least one adjacent link structure such that a portion of each link structure traverses through an interior of the loop of the adjacent link structure. The method also includes coupling a first tensioner to a first of the link structures at a first end of the chain. The first tensioner is configured to electrically connect the first link structure to a circuit element. The method further includes coupling a second tensioner to a second of the link structures at a second end of the chain. The second tensioner is configured to electrically connect the second link structure to another circuit element.

Abstract: An embodiment of the present invention is a technique to fabricate a package substrate. The package substrate includes top substrate layers, an array capacitor, and bottom substrate layers. The top substrate layers embed micro-vias. The micro-vias have a micro-via area and provide electrical connections between the top substrate layers. The array capacitor structure is placed in contact with the micro-via area. The array capacitor structure is electrically connected to the micro-vias. The bottom substrate layers are formed on the array capacitor structure.

Abstract: Some embodiments of the present invention include capacitors with controlled equivalent series resistance.