Patents by Inventor Kimberly G. Reid
Kimberly G. Reid has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11691421Abstract: A thermal bend actuator includes: a thermoelastic beam for connection to drive circuitry; and a passive beam mechanically cooperating with the thermoelastic beam, such that when a current is passed through the thermoelastic beam, the thermoelastic beam expands relative to the passive beam resulting in bending of the actuator. The thermoelastic beam wherein the thermoelastic beam is comprised of an aluminium alloy. The aluminium alloy comprises a first metal which is aluminium, a second metal, and at least 0.1 at. % of a third metal selected from the group consisting of: copper, scandium, tungsten, molybdenum, chromium, titanium, silicon and magnesium.Type: GrantFiled: January 27, 2022Date of Patent: July 4, 2023Inventors: Rónán O'Reilly, Misty Bagnat, Owen Byrne, Alexandra Barczuk, Michael Shnider, Darren Hackett, Brian Kevin Donohoe, Kimberly G. Reid
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Publication number: 20220242122Abstract: A thermal bend actuator includes: a thermoelastic beam for connection to drive circuitry; and a passive beam mechanically cooperating with the thermoelastic beam, such that when a current is passed through the thermoelastic beam, the thermoelastic beam expands relative to the passive beam resulting in bending of the actuator. The thermoelastic beam wherein the thermoelastic beam is comprised of an aluminium alloy. The aluminium alloy comprises a first metal which is aluminium, a second metal, and at least 0.1 at. % of a third metal selected from the group consisting of: copper, scandium, tungsten, molybdenum, chromium, titanium, silicon and magnesium.Type: ApplicationFiled: January 27, 2022Publication date: August 4, 2022Inventors: Rónán O'REILLY, Misty BAGNAT, Owen BYRNE, Alexandra BARCZUK, Michael SHNIDER, Darren HACKETT, Brian Kevin DONOHOE, Kimberly G. REID
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Patent number: 9627615Abstract: Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform a switching function. In embodiments, precursors, in a gaseous form, may be utilized in a chamber to build a film of correlated electron materials comprising various impedance characteristics.Type: GrantFiled: January 26, 2016Date of Patent: April 18, 2017Assignee: ARM Ltd.Inventors: Kimberly G. Reid, Carlos Alberto Paz de Araujo, Lucian Shifren
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Patent number: 7994070Abstract: A method for depositing a dielectric film on a substrate includes positioning a plurality of substrates in a process chamber, heating the process chamber to a deposition temperature between 400° C. and less than 650° C., flowing a first process gas comprising water vapor into the process chamber, flowing a second process gas comprising dichlorosilane (DCS) into the process chamber, establishing a gas pressure of less than 2 Torr, and reacting the first and second process gases to thermally deposit a silicon oxide film on the plurality of substrates. One embodiment further includes flowing a third process gas comprising nitric oxide (NO) gas into the process chamber while flowing the first process gas and the second process gas; and reacting the oxide film with the third process gas to form a silicon oxynitride film on the substrate.Type: GrantFiled: September 30, 2010Date of Patent: August 9, 2011Assignee: Tokyo Electron LimitedInventors: Anthony Dip, Kimberly G Reid
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Patent number: 7816278Abstract: An in-situ hybrid film deposition method for forming a high-k dielectric film on a plurality of substrates in a batch processing system. The method includes loading the plurality of substrates into a process chamber of the batch processing system, depositing by atomic layer deposition (ALD) a first portion of a high-k dielectric film on the plurality of substrates, after depositing the first portion, and without removing the plurality of substrates from the process chamber, depositing by chemical vapor deposition (CVD) a second portion of the high-k dielectric film on the first portion, and removing the plurality of substrates from the process chamber. The method can further include alternatingly repeating the deposition of the first and second portions until the high-k dielectric film has a desired thickness. The method can still further include pre-treating the substrates and post-treating the high-k dielectric film in-situ prior to the removing.Type: GrantFiled: March 28, 2008Date of Patent: October 19, 2010Assignee: Tokyo Electron LimitedInventors: Kimberly G. Reid, Anthony Dip
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Patent number: 7776763Abstract: A method is provided for in-situ formation of a thin oxidized AlN film on a substrate. The method includes providing the substrate in a process chamber, depositing an AlN film on the substrate, and post-treating the AlN film with exposure to a nitrogen and oxygen-containing gas. The post-treating increases the dielectric constant of the AlN film with substantially no increase in the AlN film thickness. The method can also include pre-treating the substrate prior to AlN deposition, post-annealing the AlN film before or after the post-treatment, or both.Type: GrantFiled: May 7, 2007Date of Patent: August 17, 2010Assignee: Tokyo Electron LimitedInventors: Kimberly G. Reid, Anthony Dip
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Patent number: 7659214Abstract: A method for growing an oxynitride film on a substrate includes positioning the substrate in a process chamber, heating the process chamber, flowing a first wet process gas comprising water vapor into the process chamber, and reacting the substrate with the first wet process gas to grow an oxide film on the substrate. The method further includes flowing a second wet process gas comprising water vapor and a nitriding gas comprising nitric oxide into the process chamber, and reacting the oxide film and the substrate with the second wet process gas to grow an oxynitride film. In another embodiment, the method further comprises annealing the substrate containing the oxynitride film in an annealing gas. According to one embodiment of the method where the substrate is silicon, a silicon oxynitride film can be formed that exhibits a nitrogen peak concentration of approximately 3 atomic % or greater.Type: GrantFiled: September 30, 2007Date of Patent: February 9, 2010Assignee: Tokyo Electron LimitedInventors: Kimberly G. Reid, Anthony Dip
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Publication number: 20090246971Abstract: An in-situ hybrid film deposition method for forming a high-k dielectric film on a plurality of substrates in a batch processing system. The method includes loading the plurality of substrates into a process chamber of the batch processing system, depositing by atomic layer deposition (ALD) a first portion of a high-k dielectric film on the plurality of substrates, after depositing the first portion, and without removing the plurality of substrates from the process chamber, depositing by chemical vapor deposition (CVD) a second portion of the high-k dielectric film on the first portion, and removing the plurality of substrates from the process chamber. The method can further include alternatingly repeating the deposition of the first and second portions until the high-k dielectric film has a desired thickness. The method can still further include pre-treating the substrates and post-treating the high-k dielectric film in-situ prior to the removing.Type: ApplicationFiled: March 28, 2008Publication date: October 1, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Kimberly G. Reid, Anthony Dip
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Patent number: 7534731Abstract: A method for growing an oxynitride film on a substrate includes positioning the substrate in a process chamber, heating the process chamber, flowing a wet process gas comprising water vapor and a nitriding gas comprising nitric oxide into the process chamber. The wet process gas and the nitriding gas form a processing ambient that reacts with the substrate such that an oxynitride film grows on the substrate. In yet another embodiment, the method further comprises flowing a diluting gas into the process chamber while flowing the wet process gas to control a growth rate of the oxynitride film. In another embodiment, the method further comprises annealing the substrate and the oxynitride film in an annealing gas. According to embodiments of the method where the substrate is silicon, a silicon oxynitride film forms that exhibits a nitrogen peak concentration of at least approximately 6 atomic % and an interface state density of less than approximately 1.5 ×10 12 per cc.Type: GrantFiled: March 30, 2007Date of Patent: May 19, 2009Assignee: Tokyo Electron LimitedInventors: Kimberly G. Reid, Anthony Dip
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Publication number: 20090088000Abstract: A method for growing an oxynitride film on a substrate includes positioning the substrate in a process chamber, heating the process chamber, flowing a first wet process gas comprising water vapor into the process chamber, and reacting the substrate with the first wet process gas to grow an oxide film on the substrate. The method further includes flowing a second wet process gas comprising water vapor and a nitriding gas comprising nitric oxide into the process chamber, and reacting the oxide film and the substrate with the second wet process gas to grow an oxynitride film. In another embodiment, the method further comprises annealing the substrate containing the oxynitride film in an annealing gas. According to one embodiment of the method where the substrate is silicon, a silicon oxynitride film can be formed that exhibits a nitrogen peak concentration of approximately 3 atomic % or greater.Type: ApplicationFiled: September 30, 2007Publication date: April 2, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Kimberly G. Reid, Anthony Dip
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Publication number: 20080242109Abstract: A method for growing an oxynitride film on a substrate includes positioning the substrate in a process chamber, heating the process chamber, flowing a wet process gas comprising water vapor and a nitriding gas comprising nitric oxide into the process chamber. The wet process gas and the nitriding gas form a processing ambient that reacts with the substrate such that an oxynitride film grows on the substrate. In yet another embodiment, the method further comprises flowing a diluting gas into the process chamber while flowing the wet process gas to control a growth rate of the oxynitride film. In another embodiment, the method further comprises annealing the substrate and the oxynitride film in an annealing gas. According to embodiments of the method where the substrate is silicon, a silicon oxynitride film forms that exhibits a nitrogen peak concentration of at least approximately 6 atomic % and an interface state density of less than approximately 1.5×1012 per cc.Type: ApplicationFiled: March 30, 2007Publication date: October 2, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Kimberly G. Reid, Anthony Dip
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Publication number: 20070259534Abstract: A method is provided for in-situ formation of a thin oxidized AlN film on a substrate. The method includes providing the substrate in a process chamber, depositing an AlN film on the substrate, and post-treating the AlN film with exposure to a nitrogen and oxygen-containing gas. The post-treating increases the dielectric constant of the AlN film with substantially no increase in the AlN film thickness. The method can also include pre-treating the substrate prior to AlN deposition, post-annealing the AlN film before or after the post-treatment, or both.Type: ApplicationFiled: May 7, 2007Publication date: November 8, 2007Applicant: TOKYO ELECTRON LIMITEDInventors: Kimberly G. Reid, Anthony Dip
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Patent number: 6949455Abstract: A method for providing gates of transistors with at least two different work functions utilizes a silicidation of two different metals at different times, silicidation for one gate and polysilicon for the other, or silicidation using a single metal with two differently doped silicon structures. Thus the problem associated with performing silicidation of two different metals at the same time is avoided. If the two metals have significantly different silicidation temperatures, the one with the lower temperature silicidation will likely have significantly degraded performance as a result of having to also experience the higher temperature required to achieve silicidation with the other metal.Type: GrantFiled: October 1, 2003Date of Patent: September 27, 2005Assignee: Freescale Semiconductor, Inc.Inventors: Daniel Thanh-Khac Pham, Bich-Yen Nguyen, James K. Schaeffer, Melissa O. Zavala, Sherry G. Straub, Kimberly G. Reid, Marc Rossow, James P. Geren
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Publication number: 20040063285Abstract: A method for providing gates of transistors with at least two different work functions utilizes a silicidation of two different metals at different times, silicidation for one gate and polysilicon for the other, or silicidation using a single metal with two differently doped silicon structures. Thus the problem associated with performing silicidation of two different metals at the same time is avoided. If the two metals have significantly different silicidation temperatures, the one with the lower temperature silicidation will likely have significantly degraded performance as a result of having to also experience the higher temperature required to achieve silicidation with the other metal.Type: ApplicationFiled: October 1, 2003Publication date: April 1, 2004Inventors: Daniel Thanh-Khac Pham, Bich-Yen Nguyen, James K. Schaeffer, Melissa O. Zavala, Sherry G. Straub, Kimberly G. Reid, Marc Rossow, James P. Geren
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Patent number: 6689676Abstract: A method for providing gates of transistors with at least two different work functions utilizes a silicidation of two different metals at different times, silicidation for one gate and polysilicon for the other, or silicidation using a single metal with two differently doped silicon structures. Thus the problem associated with performing silicidation of two different metals at the same time is avoided. If the two metals have significantly different silicidation temperatures, the one with the lower temperature silicidation will likely have significantly degraded performance as a result of having to also experience the higher temperature required to achieve silicidation with the other metal.Type: GrantFiled: July 26, 2002Date of Patent: February 10, 2004Assignee: Motorola, Inc.Inventors: Daniel Thanh-Khac Pham, Al T. Koh, Yeong-Jyh T. Lii, Robert F. Steimle, Anne Vandooren, Ricardo Garcia, Kimberly G. Reid, Marc Rossow, James P. Geren
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Publication number: 20040018681Abstract: A method for providing gates of transistors with at least two different work functions utilizes a silicidation of two different metals at different times, silicidation for one gate and polysilicon for the other, or silicidation using a single metal with two differently doped silicon structures. Thus the problem associated with performing silicidation of two different metals at the same time is avoided. If the two metals have significantly different silicidation temperatures, the one with the lower temperature silicidation will likely have significantly degraded performance as a result of having to also experience the higher temperature required to achieve silicidation with the other metal.Type: ApplicationFiled: July 26, 2002Publication date: January 29, 2004Inventors: Daniel Thanh-Khac Pham, Bich-Yen Nguyen, James K. Schaeffer, Melissa O. Zavala, Sherry G. Straub, Al T. Koh, Yeong-Jyh T. Lii, Robert F. Steimle, Anne Vandooren, Ricardo Garcia, Kimberly G. Reid, Marc Rossow, James P. Geren
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Publication number: 20020187651Abstract: A technique for controlling the oxidation of silicon is achieved by applying low temperature ammonia prior to the oxidation. The result is that the subsequent oxidation of the silicon is at a slower oxidation rate and higher nitrogen content. The higher nitrogen content is particularly beneficial for a gate dielectric because it acts as somewhat of a boron barrier and provides additional resistance to unwanted oxidation. The result is transistors with improved gate dielectric thickness uniformity across a wafer for a tighter threshold voltage distribution, reduced shift in threshold voltage, and improved time to breakdown.Type: ApplicationFiled: June 11, 2001Publication date: December 12, 2002Inventors: Kimberly G. Reid, Hsing-Huang Tseng, Julie C.H. Chang, John R. Alvis