Abstract: An error detection and correction (EDAC) circuit mitigates the effect of single event upsets (SEU) events in a redundant memory system. The EDAC circuit includes a first input for receiving first data and parity information stored by a first memory device and a second input for receiving second data and parity information stored by a second memory device. First parity check logic calculates parity for the received first data and parity information. Second parity check logic calculates parity for the received second data and parity information. Bit comparison logic detects differences between the first data and the second data, and between the first parity information and the second parity information. Based on the parity check calculated for the first and second data, and the bit comparison, data select logic selects either the first data or the second data for provision to a data bus.

Abstract: An error detection and correction (EDAC) circuit mitigates the effect of single event upsets (SEU) events in a redundant memory system. The EDAC circuit includes a first input for receiving first data and parity information stored by a first memory device and a second input for receiving second data and parity information stored by a second memory device. First parity check logic calculates parity for the received first data and parity information. Second parity check logic calculates parity for the received second data and parity information. Bit comparison logic detects differences between the first data and the second data, and between the first parity information and the second parity information. Based on the parity check calculated for the first and second data, and the bit comparison, data select logic selects either the first data or the second data for provision to a data bus.

Abstract: An electronic engine controller has a processor, a data controller, and a non-volatile memory. During an engine operation, power is supplied to the processor, data controller, and non-volatile memory from an engine power source. Sensor data is received at the processor which supplies the sensor data to the data controller. The data controller stores the sensor data in the non-volatile memory. During data retrieval, power is supplied to the data controller and the non-volatile memory from a USB communications channel. The data controller retrieves the saved sensor data from the non-volatile memory and provides it to the USB communications channel.