Patents by Inventor Kimihiko Yamashita

Kimihiko Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7999352
    Abstract: A semiconductor device equipped with a metal thin film resistor is disclosed. The semiconductor device includes a second interlayer insulating film formed on a first interlayer insulating film including a formation area of a wiring pattern. Connecting holes are formed in the second interlayer insulating film corresponding to both ends of the metal thin film resistor and the wiring pattern. An upper part of each connecting hole is formed in a taper shape. A sidewall is formed on the inner wall of each connecting hole. The metal thin film resistor is formed on the second interlayer insulating film between the connecting holes, inside of each connecting hole, and on the wiring pattern.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: August 16, 2011
    Assignee: Ricoh Company, Ltd.
    Inventors: Kimihiko Yamashita, Yasunori Hashimoto
  • Patent number: 7986028
    Abstract: A semiconductor device, includes a lower layer side insulation film; a wiring pattern formed on the lower layer side insulation film; a base insulation film formed on the lower layer side insulation film and the wiring pattern; and a plurality of metal thin film resistance elements formed on the base insulation film; wherein a connection hole is formed in the base insulation film on the wiring pattern; the wiring pattern and the metal thin film resistance element are electrically connected in the connection hole; the metal thin film resistance element has a belt shape part arranged separately from the connection hole and a connection part continuously formed with the belt shape part and connected to the wiring pattern in the connection hole; and the connection parts of at least two of the metal thin film resistance element are formed in the single connection hole with a gap in between said connection parts.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: July 26, 2011
    Assignee: Ricoh Company, Ltd.
    Inventors: Kimihiko Yamashita, Yasunori Hashimoto
  • Patent number: 7855434
    Abstract: A semiconductor device is provided wherein a foundation insulating film is formed over a semiconductor substrate, a metal resistance element is formed on the foundation insulating film, and contacts are formed at both ends of the metal resistance element in a longitudinal direction of the metal resistance element and connected to the metal resistance element. The foundation insulating film comprises a single upwardly concave curved surface constituting not less than about 40 percent of an upper surface of the metal resistance element between the contacts in the longitudinal direction thereof. The curved surface of the foundation insulating film causes the metal resistance element to comprise a single upwardly concave curved surface constituting not less than about 40 percent of upper and lower surfaces of the metal resistance element between the contacts in the longitudinal direction thereof.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: December 21, 2010
    Assignee: Ricoh Company, Ltd.
    Inventor: Kimihiko Yamashita
  • Patent number: 7745877
    Abstract: A disclosed semiconductor device provided with a power MOSFET includes: a semiconductor substrate constituting a drain; a trench formed on a surface of the semiconductor substrate; a gate electrode in the trench; a body diffusion layer on a surface side of the semiconductor substrate, the body diffusion layer being positioned adjacently to the trench and formed shallower than the trench; a source diffusion layer on the surface of the semiconductor substrate; a first interlayer insulating film formed on the gate electrode; and a source electrode film made of a metallic material and formed on the semiconductor substrate. A top surface of the gate electrode and a top surface of the first interlayer insulating film are formed in a recessed manner in the trench relative to the surface of the semiconductor substrate, and a surface portion of the semiconductor substrate for the trench is formed into a tapered shape.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: June 29, 2010
    Assignee: Ricoh Company, Ltd.
    Inventors: Kikuo Saka, Kimihiko Yamashita, Toshiyuki Takemori, Yuji Watanabe
  • Patent number: 7718502
    Abstract: A semiconductor apparatus includes a wiring pattern, an insulating film, and a thin-metal-film resistor element. The insulating film is formed on the wiring pattern having connection holes vertically penetrating there-through to expose part of the wiring pattern at bottom regions of the connection holes. The connection holes are arranged with a space there-between. The thin-metal-film resistor element is formed on the insulating film and extending to continuously overlay and contact surfaces of the insulating film, inner walls of the connection holes, and the wiring pattern at the bottom regions of the connection holes.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: May 18, 2010
    Assignee: Ricoh Company, Ltd.
    Inventors: Kimihiko Yamashita, Yasunori Hashimoto
  • Patent number: 7550819
    Abstract: A semiconductor device having a metal thin-film resistance on an insulation film includes first and second contact holes formed in the insulation film, a first conductive plug formed in the first contact hole, a second conductive plug formed in the second contact hole simultaneously to formation of the first conductive plug, a metal thin-film resistance formed on the first conductive plug and on the insulation film, and a metal interconnection pattern formed on the second conductive plug and the insulation film.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: June 23, 2009
    Assignee: Ricoh Company, Ltd.
    Inventor: Kimihiko Yamashita
  • Publication number: 20090114982
    Abstract: A disclosed semiconductor device provided with a power MOSFET includes: a semiconductor substrate constituting a drain; a trench formed on a surface of the semiconductor substrate; a gate electrode in the trench; a body diffusion layer on a surface side of the semiconductor substrate, the body diffusion layer being positioned adjacently to the trench and formed shallower than the trench; a source diffusion layer on the surface of the semiconductor substrate; a first interlayer insulating film formed on the gate electrode; and a source electrode film made of a metallic material and formed on the semiconductor substrate. A top surface of the gate electrode and a top surface of the first interlayer insulating film are formed in a recessed manner in the trench relative to the surface of the semiconductor substrate, and a surface portion of the semiconductor substrate for the trench is formed into a tapered shape.
    Type: Application
    Filed: September 13, 2007
    Publication date: May 7, 2009
    Inventors: Kikuo Saka, Kimihiko Yamashita, Toshiyuki Takemori, Yuji Watanabe
  • Publication number: 20080237799
    Abstract: A semiconductor device is provided wherein a foundation insulating film is formed over a semiconductor substrate, a metal resistance element is formed on the foundation insulating film, and contacts are formed at both ends of the metal resistance element in a longitudinal direction of the metal resistance element and connected to the metal resistance element. The foundation insulating film comprises a single upwardly concave curved surface constituting not less than about 40 percent of an upper surface of the metal resistance element between the contacts in the longitudinal direction thereof. The curved surface of the foundation insulating film causes the metal resistance element to comprise a single upwardly concave curved surface constituting not less than about 40 percent of upper and lower surfaces of the metal resistance element between the contacts in the longitudinal direction thereof.
    Type: Application
    Filed: March 26, 2008
    Publication date: October 2, 2008
    Applicant: Ricoh Company, Ltd.
    Inventor: Kimihiko Yamashita
  • Publication number: 20080100348
    Abstract: A semiconductor device, includes a lower layer side insulation film; a wiring pattern formed on the lower layer side insulation film; a base insulation film formed on the lower layer side insulation film and the wiring pattern; and a plurality of metal thin film resistance elements formed on the base insulation film; wherein a connection hole is formed in the base insulation film on the wiring pattern; the wiring pattern and the metal thin film resistance element are electrically connected in the connection hole; the metal thin film resistance element has a belt shape part arranged separately from the connection hole and a connection part continuously formed with the belt shape part and connected to the wiring pattern in the connection hole; and the connection parts of at least two of the metal thin film resistance element are formed in the single connection hole with a gap in between said connection parts.
    Type: Application
    Filed: September 21, 2006
    Publication date: May 1, 2008
    Inventors: Kimihiko Yamashita, Yasunori Hashimoto
  • Publication number: 20080090371
    Abstract: A semiconductor apparatus includes a wiring pattern, an insulating film, and a thin-metal-film resistor element. The insulating film is formed on the wiring pattern having connection holes vertically penetrating there-through to expose part of the wiring pattern at bottom regions of the connection holes. The connection holes are arranged with a space there-between. The thin-metal-film resistor element is formed on the insulating film and extending to continuously overlay and contact surfaces of the insulating film, inner walls of the connection holes, and the wiring pattern at the bottom regions of the connection holes.
    Type: Application
    Filed: November 14, 2007
    Publication date: April 17, 2008
    Inventors: Kimihiko Yamashita, Yasunori Hashimoto
  • Patent number: 7312515
    Abstract: A semiconductor apparatus includes a wiring pattern, an insulating film, and a thin-metal-film resistor element. The insulating film is formed on the wiring pattern having connection holes vertically penetrating there-through to expose part of the wiring pattern at bottom regions of the connection holes. The connection holes are arranged with a space there-between. The thin-metal-film resistor element is formed on the insulating film and extending to continuously overlay and contact surfaces of the insulating film, inner walls of the connection holes, and the wiring pattern at the bottom regions of the connection holes.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: December 25, 2007
    Assignee: Ricoh Company, Ltd.
    Inventors: Kimihiko Yamashita, Yasunori Hashimoto
  • Patent number: 7202549
    Abstract: A semiconductor device, a method for manufacturing the semiconductor device, and an integrated circuit including the semiconductor device are disclosed. The semiconductor device includes a substrate section, a resistor formed on the substrate section, a metal pattern formed on the resistor, an oxide pattern formed on the metal pattern, and a protective film covering the resistor, the metal pattern and the oxide pattern. With this structure, the metal pattern sufficiently prevents formation of an oxide film on a surface of the resistor even when dry ashing or dry etching is performed in the manufacturing process.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: April 10, 2007
    Assignee: Ricoh Company, Ltd.
    Inventors: Yasunori Hashimoto, Kimihiko Yamashita
  • Publication number: 20060027892
    Abstract: A semiconductor device equipped with a metal thin film resistor is disclosed. The semiconductor device includes a second interlayer insulating film formed on a first interlayer insulating film including a formation area of a wiring pattern. Connecting holes are formed in the second interlayer insulating film corresponding to both ends of the metal thin film resistor and the wiring pattern. An upper part of each connecting hole is formed in a taper shape. A sidewall is formed on the inner wall of each connecting hole. The metal thin film resistor is formed on the second interlayer insulating film between the connecting holes, inside of each connecting hole, and on the wiring pattern.
    Type: Application
    Filed: August 16, 2005
    Publication date: February 9, 2006
    Inventors: Kimihiko Yamashita, Yasunori Hashimoto
  • Publication number: 20050212085
    Abstract: A semiconductor device includes: an insulating film; a metal thin-film resistance element; a wiring pattern formed on the insulating film, a part of which forms an electrode for electrically connecting with the metal thin-film resistance element; and a side wall produced at least on a side surface of the electrode of the wiring pattern, and made of an insulation material, wherein: the metal thin-film resistance element is produced across a top surface of the electrode and a surface of the insulating film via a surface of the side wall.
    Type: Application
    Filed: February 17, 2005
    Publication date: September 29, 2005
    Inventors: Yasunori Hashimoto, Kimihiko Yamashita
  • Publication number: 20050202219
    Abstract: A semiconductor device having a metal thin-film resistance on an insulation film includes first and second contact holes formed in the insulation film, a first conductive plug formed in the first contact hole, a second conductive plug formed in the second contact hole simultaneously to formation of the first conductive plug, a metal thin-film resistance formed on the first conductive plug and on the insulation film, and a metal interconnection pattern formed on the second conductive plug and the insulation film.
    Type: Application
    Filed: February 18, 2005
    Publication date: September 15, 2005
    Inventor: Kimihiko Yamashita
  • Publication number: 20040262709
    Abstract: A semiconductor apparatus includes a wiring pattern, an insulating film, and a thin-metal-film resistor element. The insulating film is formed on the wiring pattern having connection holes vertically penetrating there-through to expose part of the wiring pattern at bottom regions of the connection holes. The connection holes are arranged with a space there-between. The thin-metal-film resistor element is formed on the insulating film and extending to continuously overlay and contact surfaces of the insulating film, inner walls of the connection holes, and the wiring pattern at the bottom regions of the connection holes.
    Type: Application
    Filed: June 7, 2004
    Publication date: December 30, 2004
    Inventors: Kimihiko Yamashita, Yasunori Hashimoto
  • Publication number: 20040238920
    Abstract: A semiconductor device, a method for manufacturing the semiconductor device, and an integrated circuit including the semiconductor device are disclosed. The semiconductor device includes a substrate section, a resistor formed on the substrate section, a metal pattern formed on the resistor, an oxide pattern formed on the metal pattern, and a protective film covering the resistor, the metal pattern and the oxide pattern. With this structure, the metal pattern sufficiently prevents formation of an oxide film on a surface of the resistor even when dry ashing or dry etching is performed in the manufacturing process.
    Type: Application
    Filed: May 19, 2004
    Publication date: December 2, 2004
    Inventors: Yasunori Hashimoto, Kimihiko Yamashita