Patents by Inventor Kimihisa Oka

Kimihisa Oka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11934305
    Abstract: According to an embodiment, when receiving a read request designating a logical address range of a particular size or more from a host, a first circuit issues a plurality of first sub-commands, each of which is a sub-command for each first data unit, in order of logical addresses. A second circuit respectively adds serial numbers corresponding to the plurality of first sub-commands in the order of issuance. A plurality of third circuits respectively executes processing of specifying locations of the first data unit based on management information for the plurality of first sub-commands in a distributed manner. A fifth circuit reorders the plurality of first sub-commands in the logical address order based on the serial numbers after the processing by the plurality of third circuits. A sixth circuit executes a read operation on a first memory based on the plurality of first sub-commands reordered in the order of logical addresses.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: March 19, 2024
    Assignee: Kioxia Corporation
    Inventors: Toru Motoya, Mitsunori Tadokoro, Tomonori Yokoyama, Fuyuki Ichiba, Kensuke Minato, Kimihisa Oka
  • Publication number: 20230185708
    Abstract: According to an embodiment, when receiving a read request designating a logical address range of a particular size or more from a host, a first circuit issues a plurality of first sub-commands, each of which is a sub-command for each first data unit, in order of logical addresses. A second circuit respectively adds serial numbers corresponding to the plurality of first sub-commands in the order of issuance. A plurality of third circuits respectively executes processing of specifying locations of the first data unit based on management information for the plurality of first sub-commands in a distributed manner. A fifth circuit reorders the plurality of first sub-commands in the logical address order based on the serial numbers after the processing by the plurality of third circuits. A sixth circuit executes a read operation on a first memory based on the plurality of first sub-commands reordered in the order of logical addresses.
    Type: Application
    Filed: June 15, 2022
    Publication date: June 15, 2023
    Applicant: Kioxia Corporation
    Inventors: Toru MOTOYA, Mitsunori TADOKORO, Tomonori YOKOYAMA, Fuyuki ICHIBA, Kensuke MINATO, Kimihisa OKA
  • Publication number: 20100110294
    Abstract: According to one embodiment, a video display device includes an HDMI interface which transfers video information and control commands to and from a video output device connected thereto. The video display device further includes a video display module having one or more display areas to display external video and/or internal video, and a notification module which notifies resolution information for the display areas to the video output device using the control commands when the video display module simultaneously displays multiple videos including the external video.
    Type: Application
    Filed: October 29, 2009
    Publication date: May 6, 2010
    Inventor: Kimihisa Oka