Patents by Inventor Kimikatsu Matsubara

Kimikatsu Matsubara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Communication control device
    Patent number: 6016521
    Abstract: A communication control device has a central processing unit (3), an input data buffer (14), an output data buffer (15), a readout reload register (17), an output reload register (18), and a timer (19) located between an input terminal (1) and an output terminal (2). The timer (19) reads count values stored in both the reload registers (17, 18) alternately, that have already been set by the central processing unit (3) according to a protocol to be processed, and performs a counting operation based on the count values. Communication data items stored in both the data buffers (14, 15) are latched based on a time out output from the timer (19).
    Type: Grant
    Filed: April 8, 1998
    Date of Patent: January 18, 2000
    Assignees: Mitsubishi Electric Semiconductor Systems Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kimikatsu Matsubara
  • Microcomputer with built-in serial input-output circuit and collision detection circuit responsive to common input-output line being occupied
    Patent number: 5765019
    Abstract: Even in the case where a microcomputer according to the present invention is directly connected to a bus in a LAN, it is possible to upgrade the data transfer speed of the LAN. When a built-in exclusive-OR circuit in the SIO of the microcomputer detects the discordance between a signal at an R.times.D terminal and a signal at a T.times.D terminal, a D flip-flop circuit generates and sends out an interrupt signal to the CPU. The CPU is made to recognize the collision of signals by the generation of the interrupt signal.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: June 9, 1998
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Semiconductor Software Co., Ltd.
    Inventors: Masahiro Asano, Kimikatsu Matsubara
  • Microcomputer with built-in serial input-output circuit and collision detection circuit responsive to common input-output line being occupied
    Patent number: 5636343
    Abstract: Even in the case where a microcomputer according to the present invention is directly connected to a bus in a LAN, it is possible to upgrade the data transfer speed of the LAN. When a built-in exclusive-OR circuit in the SIO of the microcomputer detects the discordance between a signal at an R.times.D terminal and a signal at a T.times.D terminal, a D flip-flop circuit generates and sends out an interrupt signal to the CPU. The CPU is made to recognize the collision of signals by the generation of the interrupt signal.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: June 3, 1997
    Assignees: Mitsubishi Electric Semiconductor Software Co., Ltd., Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masahiro Asano, Kimikatsu Matsubara