Abstract: A physical quantity detection circuit includes: a detection signal generation circuit generating a detection signal, based on an output signal from a physical quantity detection element; an analog/digital converter circuit converting the detection signal into a first digital signal and converting a test signal into a second digital signal; a test signal generation circuit generating the test signal; and a malfunction diagnosis circuit diagnosing a malfunction of the analog/digital converter circuit, based on the second digital signal. A full-scale voltage of the analog/digital converter circuit is selected from among a plurality of voltages having different magnitudes, according to a power supply voltage. The test signal includes an upper limit value test signal, a lower limit value test signal, and a first intermediate value test signal. The test signal generation circuit performs resistive voltage division of the full-scale voltage and thus generates the first intermediate value test signal.

Abstract: A physical quantity detection circuit includes a detection signal generation circuit that generates a detection signal according to a physical quantity based on an output signal of a physical quantity detection element that detects the physical quantity, an analog/digital conversion circuit that converts the detection signal into a digital signal, a reference voltage generation circuit that generates a reference voltage supplied to the analog/digital conversion circuit, and a failure diagnosis circuit that performs a failure diagnosis of the reference voltage generation circuit by monitoring the reference voltage and outputs a failure diagnosis signal indicating a result of the failure diagnosis, in which the failure diagnosis circuit performs the failure diagnosis at a predetermined timing different from a timing when the reference voltage varies temporarily according to an operation of the analog/digital conversion circuit.

Abstract: A physical quantity detection circuit includes a detection signal generation circuit that generates a detection signal based on an output signal of a physical quantity detection element, an analog/digital conversion circuit that converts the detection signal into a first digital signal during a first period and converts the first test signal into a second digital signal during a second period, a digital signal processing circuit that processes the first digital signal to generate a third digital signal during the first period and processes a second test signal to generate a fourth digital signal during the second period, and a failure diagnosis circuit that performs a failure diagnosis of the analog/digital conversion circuit based on the second digital signal and a failure diagnosis of the digital signal processing circuit based on the fourth digital signal during the second period.

Abstract: A physical quantity detection circuit includes a detection signal generation circuit that generates a detection signal according to a physical quantity based on an output signal of a physical quantity detection element that detects the physical quantity, an analog/digital conversion circuit that converts the detection signal into a digital signal, a reference voltage generation circuit that generates a reference voltage supplied to the analog/digital conversion circuit, and a failure diagnosis circuit that performs a failure diagnosis of the reference voltage generation circuit by monitoring the reference voltage and outputs a failure diagnosis signal indicating a result of the failure diagnosis, in which the failure diagnosis circuit performs the failure diagnosis at a predetermined timing different from a timing when the reference voltage varies temporarily according to an operation of the analog/digital conversion circuit.

Abstract: A physical quantity detection circuit includes: a detection signal generation circuit generating a detection signal, based on an output signal from a physical quantity detection element; an analog/digital converter circuit converting the detection signal into a first digital signal and converting a test signal into a second digital signal; a test signal generation circuit generating the test signal; and a malfunction diagnosis circuit diagnosing a malfunction of the analog/digital converter circuit, based on the second digital signal. A full-scale voltage of the analog/digital converter circuit is selected from among a plurality of voltages having different magnitudes, according to a power supply voltage. The test signal includes an upper limit value test signal, a lower limit value test signal, and a first intermediate value test signal. The test signal generation circuit performs resistive voltage division of the full-scale voltage and thus generates the first intermediate value test signal.

Abstract: A physical quantity detection circuit includes a detection signal generation circuit that generates a detection signal based on an output signal of a physical quantity detection element, an analog/digital conversion circuit that converts the detection signal into a first digital signal during a first period and converts the first test signal into a second digital signal during a second period, a digital signal processing circuit that processes the first digital signal to generate a third digital signal during the first period and processes a second test signal to generate a fourth digital signal during the second period, and a failure diagnosis circuit that performs a failure diagnosis of the analog/digital conversion circuit based on the second digital signal and a failure diagnosis of the digital signal processing circuit based on the fourth digital signal during the second period.

Abstract: A physical quantity detection apparatus includes a vibrator which outputs a detection signal in accordance with a physical quantity and a drive circuit which drives the vibrator to oscillate, wherein the drive circuit includes: an oscillation detecting unit which detects an oscillating state or a non-oscillating state of the vibrator based on a drive signal of the vibrator; a start-up oscillation unit which assists an oscillating operation of the vibrator when a detection result of the oscillation detecting unit represents the non-oscillating state; and a switching count monitoring unit which detects that the number of times switching is performed between the oscillating state and the non-oscillating state in the oscillation detecting unit has exceeded a set upper limit number of times.

Abstract: A circuit device includes a driving circuit that generates a clock signal by oscillating a vibrator, a master clock signal generation circuit that generates a master clock signal, and a master clock signal failure detection circuit that detects a failure of the master clock signal. The master clock signal failure detection circuit detects the failure of the master clock signal on the basis of an error detection clock signal, which is the clock signal from the driving circuit, and the master clock signal.

Abstract: A circuit for a physical quantity detection device includes a drive unit that generates a drive signal that causes an vibrator to vibrate, a detection unit that detects a detection signal outputted from the vibrator based on the drive signal, a passive filter which has a filter characteristic in which a cutoff frequency is lower than a detuning frequency and a cutoff frequency band contains a frequency band higher than the cutoff frequency and to which a signal from the detection unit is inputted, and an amplification unit that amplifies a signal from the passive filter.

Abstract: A circuit device includes a control circuit that operates on the basis of a master clock signal, and an interface circuit that includes a register unit and transmits data on the basis of an external clock signal which is input from an external device. In addition, the register unit takes up error information of the master clock signal on the basis of the external clock signal and stores the taken-up error information. The interface circuit transmits the data, including the error information stored in the register unit.

Abstract: A memory device system is provided. The memory device includes a first memory, a second memory, a first register, a second register, a comparator, a transfer register, an error data register, an error address register, a parity calculation portion, and a controller. The first memory has m lines of addresses in which pieces of data are stored, and a parity bit. The second memory has m lines of addresses in which same pieces of data as the data stored in the first memory are stored. The first register is connected with the first memory. The second register is connected with the second memory. The transfer register stores a piece of data of the first memory. The error data register stores a piece of data of the second register. The error address register stores an address of the second memory. The parity calculation portion calculates parity of all pieces of data.

Abstract: A physical quantity detection apparatus includes a vibrator which outputs a detection signal in accordance with a physical quantity and a drive circuit which drives the vibrator to oscillate, wherein the drive circuit includes: an oscillation detecting unit which detects an oscillating state or a non-oscillating state of the vibrator based on a drive signal of the vibrator; a start-up oscillation unit which assists an oscillating operation of the vibrator when a detection result of the oscillation detecting unit represents the non-oscillating state; and a switching count monitoring unit which detects that the number of times switching is performed between the oscillating state and the non-oscillating state in the oscillation detecting unit has exceeded a set upper limit number of times.

Abstract: A memory device system includes: a first memory that has m lines of addresses and in which different pieces of data are respectively stored at the m lines of addresses, and a parity bit; a second memory that has m lines of addresses and in which same pieces of data as the pieces of data stored in the first memory are stored in an initial state; a first register that is connected with the first memory; a second register that is connected with the second memory; a comparator; a transfer register that stores the piece of data of the first memory; an error data register that stores the piece of data of the second register; an error address register that stores an address of the second memory; a parity calculation portion that calculates parity of all pieces of data; and a controller that performs a predetermined control.

Abstract: A circuit for a physical quantity detection device includes a drive unit that generates a drive signal that causes an vibrator to vibrate, a detection unit that detects a detection signal outputted from the vibrator based on the drive signal, a passive filter which has a filter characteristic in which a cutoff frequency is lower than a detuning frequency and a cutoff frequency band contains a frequency band higher than the cutoff frequency and to which a signal from the detection unit is inputted, and an amplification unit that amplifies a signal from the passive filter.

Abstract: A circuit for a physical quantity detection device includes a drive unit that generates a drive signal that causes an vibrator to vibrate, a detection unit that detects a detection signal outputted from the vibrator based on the drive signal, a passive filter which has a filter characteristic in which a cutoff frequency is lower than a detuning frequency and a cutoff frequency band contains a frequency band higher than the cutoff frequency and to which a signal from the detection unit is inputted, and an amplification unit that amplifies a signal from the passive filter.

Abstract: A circuit device includes a control circuit that operates on the basis of a master clock signal, and an interface circuit that includes a register unit and transmits data on the basis of an external clock signal which is input from an external device. In addition, the register unit takes up error information of the master clock signal on the basis of the external clock signal and stores the taken-up error information. The interface circuit transmits the data, including the error information stored in the register unit.

Abstract: A circuit device includes a driving circuit that generates a clock signal by oscillating a vibrator, a master clock signal generation circuit that generates a master clock signal, and a master clock signal failure detection circuit that detects a failure of the master clock signal. The master clock signal failure detection circuit detects the failure of the master clock signal on the basis of an error detection clock signal, which is the clock signal from the driving circuit, and the master clock signal.

Abstract: A circuit for a physical quantity detection device includes a drive unit that generates a drive signal that causes an vibrator to vibrate, a detection unit that detects a detection signal outputted from the vibrator based on the drive signal, a passive filter which has a filter characteristic in which a cutoff frequency is lower than a detuning frequency and a cutoff frequency band contains a frequency band higher than the cutoff frequency and to which a signal from the detection unit is inputted, and an amplification unit that amplifies a signal from the passive filter.

Abstract: A signal judgement circuit making a judgement on a signal includes: an error signal generation circuit receiving signals via at least four signal lines and outputting an error signal when, of all the received signals, the number of signals taking on a same value does not exceed half of the number of the received signals; and an output selection circuit selecting any one of the received signals and outputting the selected signal.

Abstract: To provide a signal judgement circuit that makes a judgement on signals received via at least four or more signal lines and enhances robustness and redundancy. A signal judgement circuit 1 making a judgement on a signal includes: an error signal generation circuit 10 receiving signals via at least four signal lines 100 and outputting an error signal when, of all the received signals, the number of signals taking on a same value does not exceed half of the number of the received signals; and an output selection circuit 30 selecting any one of the received signals and outputting the selected signal.