Patents by Inventor Kiminori Okada

Kiminori Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9256221
    Abstract: An information processing apparatus for processing information on semiconductor treatment apparatus includes an abnormality information display device which displays information on an abnormality in semiconductor treatment apparatus, a countermeasure information receiving device which receives countermeasure information on countermeasure, a countermeasure information storing device which stores the countermeasure information matched with abnormality identification information, an output device which outputs the countermeasure and abnormality identification information via communication device to outside, a countermeasure item display device which displays countermeasure item candidates, a countermeasure item storing device which stores countermeasure item selected from the candidates matched with the abnormality identification information, a countermeasure item transmitting device which transmits the countermeasure item and abnormality identification information via the communication device to outside, a coun
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: February 9, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shinichiro Araki, Katsuhiko Matsuda, Kiminori Okada, Taichi Ito, Susumu Nakajima, Nobuhiro Horiuchi
  • Publication number: 20140032151
    Abstract: An information processing apparatus for processing information on semiconductor treatment apparatus includes an abnormality information display device which displays information on an abormality in semiconductor treatment apparatus, a countermeasure information receiving device which receives countermeasure information on countermeasure, a countermeasure information storing device which stores the countermeasure information matched with abnormality identification information, an output device which outputs the countermeasure and abnormality identification information via communication device to outside, a countermeasure item display device which displays countermeasure item candidates, a countermeasure item storing device which stores countermeasure item selected from the candidates matched with the abnormality identification information, a countermeasure item transmitting device which transmits the countermeasure item and abnormality identification information via the communication device to outside, a count
    Type: Application
    Filed: September 30, 2013
    Publication date: January 30, 2014
    Applicant: Tokyo Electron Limited
    Inventors: Shinichiro ARAKI, Katsuhiko Matsuda, Kiminori Okada, Taichi Ito, Susumu Nakajima, Nobuhiro Horiuchi
  • Patent number: 6754554
    Abstract: An interlock system can discriminate a controller in which an abnormality occurs in a control system of a semiconductor manufacturing apparatus in which a plurality of controllers are connected through a network. A processing system contains at least one processing chamber which performs a semiconductor manufacturing process. A conveyance system takes an object to be processed in and out of the processing chamber. The control system includes at least one apparatus controller, which controls the processing system and the conveyance system, and an equipment controller, which manages the apparatus controller. The apparatus controller and the equipment controller are communicably connected through a network.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: June 22, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Toru Yamauchi, Kiminori Okada, Tadahito Nezu
  • Publication number: 20030182012
    Abstract: An interlock system can discriminate a controller in which an abnormality occurs in a control system of a semiconductor manufacturing apparatus in which a plurality of controllers are connected through a network. A processing system contains at least one processing chamber which performs a semiconductor manufacturing process. A conveyance system takes an object to be processed in and out of the processing chamber. The control system includes at least one apparatus controller, which controls the processing system and the conveyance system, and an equipment controller, which manages the apparatus controller. The apparatus controller and the equipment controller are communicably connected through a network.
    Type: Application
    Filed: December 12, 2002
    Publication date: September 25, 2003
    Inventors: Toru Yamauchi, Kiminori Okada, Tadahito Nezu