Abstract: A voltage is applied to an electrode of an electrostatic chuck for chucking a semiconductor substrate, and the application voltage is controlled stepwise by means of a voltage control section. In the electrostatic chucking system, a temperature sensor may be provided for detecting the temperature of the semiconductor substrate held by the electrostatic chuck, wherein a signal output from the temperature sensor is input to the voltage control section to thereby control the applied voltage.

Abstract: A through hole passes through an interlayer isolation film and an antireflection film, to partially expose a surface of a first wiring layer. A clearance filling member fills up a clearance under an inner edge of the antireflection film. A barrier metal film continuously covers the exposed surface of the first wiring layer, an inner wall surface of the through hole and a surface of the interlayer isolation film. Passing through the through hole, a second wiring layer is connected with the first wiring layer through the barrier metal film. Thus provided is a method of fabricating a semiconductor device improved to be capable of avoiding disconnection of a wire in a through hole.

Abstract: A voltage is applied to an electrode of an electrostatic chuck for chucking a semiconductor substrate, and the application voltage is controlled stepwise by means of a voltage control section. In the electrostatic chucking system, a temperature sensor may be provided for detecting the temperature of the semiconductor substrate held by the electrostatic chuck, wherein a signal output from the temperature sensor is input to the voltage control section to thereby control the applied voltage.

Abstract: The semiconductor device with the alignment mark includes a convex portion as a film growth control region for forming side surfaces approximately parallel to sidewalls on surfaces opposite to the sidewalls of first metal interconnection layer formed in a recess portion of the alignment mark at the time of deposition of first metal interconnection layer. Thus, the semiconductor device with the alignment mark and manufacturing method thereof allowing the easy and accurate detection of the location of a layer deposited on side surfaces of the alignment mark can be provided.

Abstract: In a semiconductor device and a method of fabrication thereof, a resin film forms an interlayer film of the semiconductor device having a multilayer interconnection structure, and is formed by only one coating using coating liquid containing silicone ladder polymers represented by the chemical formula: (HO).sub.2 (R.sub.2 Si.sub.2 O.sub.3).sub.n H.sub.2. As a result, it is possible to improve long-term reliability of electric characteristics or the like, and simplify a process.

Abstract: In a semiconductor device having alignment marks formed on a semiconductor substrate, the alignment marks include a main convex or concave alignment mark formed on said semiconductor substrate; and a plurality of minute alignment marks formed on the periphery of the main alignment mark. In areas where the minute alignment marks are formed, even when a film of aluminum or its alloy is stacked on the semiconductor substrate by high temperature sputtering, grains will not grow so as to have a large diameter. Thus, the grains created on the periphery of the main alignment mark are not erroneously recognized as the main alignment mark, thereby realizing accurate alignment.

Abstract: In a semiconductor device and a method of fabrication thereof, a resin film forms an interlayer film of the semiconductor device having a multilayer interconnection structure, and is formed by only one coating using coating liquid containing silicone ladder polymers represented by the chemical formula: (HO).sub.2 (R.sub.2 Si.sub.2 O.sub.3).sub.n H.sub.2. As a result, it is possible to improve long-term reliability of electric characteristics or the like, and simplify a process.

Abstract: In a semiconductor device and a method of fabrication thereof, a resin film forms an interlayer film of the semiconductor device having a multilayer interconnection structure, and is formed by only one coating using coating liquid containing silicone ladder polymers represented by the chemical formula: (HO).sub.2 (R.sub.2 Si.sub.2 O.sub.3).sub.n H.sub.2. As a result, it is possible to improve long-term reliability of electric characteristics or the like, and simplify a process.

Abstract: A passive state film is formed on a surface of a bonding pad as follows: A silicon substrate 71 is immersed in solution continuously supplied with ozone. Since ozone is continuously supplied, it is possible to maintain the concentration of the dissolved ozone in the solution above a predetermined concentration. Therefore, it is possible to make the speed of formation of the passive state film higher than the speed of fusion of aluminum, which is a main constituent of the bonding pad. Accordingly, it is possible to form a passive state film with no pinholes.

Abstract: A semiconductor integrated circuit device has an interconnection structure in which multilayer aluminum interconnection layers are connected through connection holes. A first aluminum interconnection layer is formed on a main surface of the semiconductor substrate. The first aluminum interconnection layer has a surface layer which includes any of high melting point metal, high melting point metal compound, high melting point metal silicide, or amorphous silicon. An insulating layer is formed on the first aluminum interconnection layer, and has a through hole if formed extending to a surface of the first aluminum interconnection layer. A second aluminum interconnection layer is formed on the insulating layer and is electrically connected to the surface layer of the first aluminum interconnection layer through the through hole. The second aluminum interconnection layer includes a titanium layer, a titanium nitride layer and an aluminum alloy layer.

Abstract: A semiconductor integrated circuit device has an interconnection structure in which multilayer aluminum interconnection layers are connected through connection holes. A first aluminum interconnection layer is formed on a main surface of the semiconductor substrate. The first aluminum interconnection layer has a surface layer which includes any of high melting point metal, high melting point metal compound, high melting point metal silicide, or amorphous silicon. An insulating layer is formed on the first aluminum interconnection layer, and has a through hole if formed extending to a surface of the first aluminum interconnection layer. A second aluminum interconnection layer is formed on the insulating layer and is electrically connected to the surface layer of the first aluminum interconnection layer through the through hole. The second aluminum interconnection layer includes a titanium layer, a titanium nitride layer and an aluminum alloy layer.

Abstract: The present invention is mainly characterized by providing an even surface of an interlayer insulating film for insulating and isolating an upper interconnection and a lower interconnection from each other. A lower interconnection layer is provided on a semiconductor substrate, having a pattern of stepped portions. A silicon type insulating film is provided on the semiconductor substrate so as to cover the lower interconnection layer. A silicon ladder resin film is filled in recessed portions of the surface of the silicon type insulating film for making even the surface of the silicon type insulating film. An upper interconnection layer electrically connected to the lower interconnection layer through a via hole is provided on the silicon type insulating film. The silicon ladder resin film has the structural formula: ##STR1## where R.sub.1 is at least one of a phenyl group and a lower alkyl group, R.sub.2 is at least one of a hydrogen atom and a lower alkyl group, and n is an integer of 20 to 1000.