Patents by Inventor Kimio Inaba

Kimio Inaba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100171210
    Abstract: A semiconductor device has a semiconductor element; an interposer substrate having a wiring pattern electrically connected to the semiconductor element and an insulating substrate formed with the wiring pattern; a connection layer for adhering between the semiconductor element and the interposer substrate; and a solder ball external terminal arranged on the interposer substrate. The insulating substrate is folded in a portion mounted with the external terminal arranged on an outer side to the semiconductor element, and the unfolded and folded portions of the insulating substrate are opposite each other to form a gap therebetween.
    Type: Application
    Filed: March 16, 2010
    Publication date: July 8, 2010
    Inventors: Masayuki Hosono, Akiji Shibata, Kimio Inaba
  • Patent number: 7626126
    Abstract: A multilayer semiconductor device has plural semiconductor devices, each having a circuit board for a ball grid array and a semiconductor chip provided on the board. The semiconductor boards are bonded together by a reflow mounting process to use a solder ball for interlayer connection so as to form a multilayer structure. The plural semiconductor devices each have a projection for restricting inclination of the circuit board, and the projection is provided between neighboring two of the circuit boards.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: December 1, 2009
    Assignee: Hitachi Cable, Ltd.
    Inventors: Akiji Shibata, Kimio Inaba, Masayuki Hosono
  • Publication number: 20080116559
    Abstract: A semiconductor device has a semiconductor element; an interposer substrate having a wiring pattern electrically connected to the semiconductor element and an insulating substrate formed with the wiring pattern; a connection layer for adhering between the semiconductor element and the interposer substrate; and a solder ball external terminal arranged on the interposer substrate. The insulating substrate is folded in a portion mounted with the external terminal arranged on an outer side to the semiconductor element, and the unfolded and folded portions of the insulating substrate are opposite each other to form a gap therebetween.
    Type: Application
    Filed: November 8, 2007
    Publication date: May 22, 2008
    Inventors: Masayuki Hosono, Akiji Shibata, Kimio Inaba
  • Publication number: 20070151754
    Abstract: A multilayer semiconductor device has plural semiconductor devices, each having a circuit board for a ball grid array and a semiconductor chip provided on the board. The semiconductor boards are bonded together by a reflow mounting process to use a solder ball for interlayer connection so as to form a multilayer structure. The plural semiconductor devices each have a projection for restricting inclination of the circuit board, and the projection is provided between neighboring two of the circuit boards.
    Type: Application
    Filed: June 7, 2006
    Publication date: July 5, 2007
    Applicant: HITACHI CABLE, LTD.
    Inventors: Akiji Shibata, Kimio Inaba, Masayuki Hosono
  • Patent number: 6222956
    Abstract: Plurality of channel waveguides of an arrayed waveguide diffraction grating are arranged such that all of intervals thereof are not constant between each two adjacent channel waveguides at a first coupling portion for coupling an input slub waveguide and the arrayed waveguide diffraction grating and a second coupling portion for coupling an output slub waveguide and the arrayed waveguide diffraction grating. Further, the plurality of channel waveguides of the arrayed waveguide diffraction grating are arranged such that all of length differences thereof are not constant between each two adjacent channel waveguides. For example, one of the channel waveguides is deleted, so that a length difference of adjacent channel waveguides is determined to be larger than that of the other two adjacent waveguides.
    Type: Grant
    Filed: November 12, 1998
    Date of Patent: April 24, 2001
    Assignee: Hitachi Cable Ltd.
    Inventors: Kenji Akiba, Kimio Inaba, Kenichi Morosawa
  • Patent number: 5982960
    Abstract: An optical wavelength multiplexer/demultiplexer has an input channel waveguide, an input slab waveguide, an arrayed-waveguide grating having N channel waveguides, an output slab waveguide, and N output channel waveguides. Each output channel waveguide is provided with an outwardly tapered end. Each tapered end has a width at its end surface which becomes larger as the output channel waveguide becomes distant from the symmetrical axis of the output slab waveguide. The loss differences suffered by each separated signal may be substantially reduced.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: November 9, 1999
    Assignee: Hitachi Cable, Ltd.
    Inventors: Kenji Akiba, Kimio Inaba
  • Patent number: 5940555
    Abstract: Provision of a predetermined number of artificial waveguides having a predetermined core width along a plurality of channel waveguides on both sides of an array waveguide diffraction grating can reduce a variation and fluctuation in core width, improving crosstalk characteristics.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: August 17, 1999
    Assignee: Hitachi Cable, Ltd.
    Inventors: Kimio Inaba, Kenji Akiba