Patents by Inventor Kimio Tsunemasu

Kimio Tsunemasu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100046190
    Abstract: To effectively suppress an adverse effect of radiation of electrical noise on other electronic circuits and increase the mounting strength of the electronic part on the substrate, where the electrical noise is noise emitted from an electronic part installed on a substrate. The tip of a nozzle for filling with a reinforcing resin is protruded into a noise shielding case through an elongated hole formed in the top board part of the noise shielding case, and the reinforcement resin is placed between the lower surface of the electronic part and the upper surface of the substrate. This realizes the noise shielding case in which a peripheral wall part surrounding the outer surfaces of the electronic part and the top board part covering the upper surface of the electronic part are integrated together. The noise shielding case prevents leakage of radiation of electrical noise from the electronic part.
    Type: Application
    Filed: April 2, 2008
    Publication date: February 25, 2010
    Inventor: Kimio Tsunemasu
  • Patent number: 6787924
    Abstract: In a semiconductor device having CSP structure, reinforcing pads are provided on corners of the mounting surface of the CSP body portion, and a plurality of solder balls are mounted on the reinforcing pads, respectively. Each of the reinforcing pads has a periphery adjacent to each of the solder balls mounted thereon that is at least semicircular, when seen in plan view. This structure avoids acute angle portions which mechanical stress is concentrated. As a result, peeling of solder balls from the reinforcing pad can be reduced.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: September 7, 2004
    Assignee: NEC Corporation
    Inventor: Kimio Tsunemasu
  • Publication number: 20020109239
    Abstract: In a semiconductor device having CSP structure, reinforcing pads are provided on corners of the mounting surface of the CSP body portion, and a plurality of solder balls are mounted on the reinforcing pads, respectively. In the reinforcing pad 21 of a square or 22 of a triangle, at least portions on which a part of solder balls positioned outer side among a plurality of the solder balls are mounted are hemmed to have roundness in line with outer sides of predetermined portions of planes of the solder balls 12 connected with the CSP body portion 11. Any acute angle portions are not produced in the hemmed portions. Mechanical stress is therefore not concentrated on the hemmed portions. As a result, remove of solder balls in the reinforcing pad can be reduced.
    Type: Application
    Filed: February 13, 2002
    Publication date: August 15, 2002
    Applicant: NEC CORPORATION
    Inventor: Kimio Tsunemasu
  • Publication number: 20020014346
    Abstract: A mounting structure of a semiconductor package can improve resistance against thermal and mechanical external force. The mounting structure of a semiconductor package establishes electrical connection of a pad on a printing circuit board to a connection wiring by soldering the semiconductor package. The pad may be integrally formed with a via. The soldering may be performed by penetrating a part of solder within the via so that the connection wiring is connected to the pad through the via at a layer different from a layer of the pad.
    Type: Application
    Filed: June 1, 2001
    Publication date: February 7, 2002
    Applicant: NEC Corporation
    Inventors: Kimio Tsunemasu, Yasunori Tanaka