Patents by Inventor Kimitaka Nishio

Kimitaka Nishio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6969919
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 ?m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: November 29, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae
  • Publication number: 20050003577
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 ?m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Application
    Filed: June 10, 2004
    Publication date: January 6, 2005
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae
  • Patent number: 6774496
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 &mgr;m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: August 10, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae
  • Patent number: 6716674
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 &mgr;m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Grant
    Filed: September 11, 2001
    Date of Patent: April 6, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae
  • Publication number: 20030153121
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 &mgr;m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Application
    Filed: March 18, 2003
    Publication date: August 14, 2003
    Applicant: Texas Instruments Incorporated
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae
  • Publication number: 20030049883
    Abstract: A semiconductor package production method containing a step in which a bond layer made of a single-layer film thermoset bond is provided on the back of a wafer on which many semiconductor devices are formed, a dicing tape is pasted onto its bond layer side, and the bond layer and the wafer are diced simultaneously in order to obtain semiconductor devices with the bond layer, and a step in which the semiconductor devices with the bond layer are detached from the dicing tape and die-attached to interposing substrates serving as bodies to which they are bonded; wherein, the aforementioned film thermoset bond contains an epoxy resin, an epoxy resin hardener, and a phenoxy resin as well as 50-80 wt % of spherical silica, and the bond layer is 100 &mgr;m or thicker. A semiconductor device made by this method and a wafer for use with this method.
    Type: Application
    Filed: September 11, 2001
    Publication date: March 13, 2003
    Inventors: Kiyoshi Yajima, Mutsumi Masumoto, Chihiro Hatano, Kimitaka Nishio, Noriyuki Kirikae