Patents by Inventor Kimitoshi Ohgiichi

Kimitoshi Ohgiichi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060077333
    Abstract: In a liquid crystal display comprising a plurality of pixels each of which has an switching element, a plurality of drain drivers and gate drivers for operating the switching elements and the pixels, and a plurality of drain lines and gate lines supplying signals from the drain drivers and the gate drivers to the switching elements being formed on one of a pair of substrates sandwiching a liquid crystal layer, the present invention provides wiring lines formed on the one of a pair of substrates for transferring display data signals and a clock signal between each pair of the plurality of drain drivers adjacent to one another, and provides at least one gate circuit for at least one of the plurality of drain drivers which is controlled by the clock signal and switches the display data signals and the clock signal either (1) to be acquired by the at least one of the plurality of drain drivers or (2) to be transferred to another of the plurality of drain drivers arranged adjacent to the at least one of the plural
    Type: Application
    Filed: November 22, 2005
    Publication date: April 13, 2006
    Inventors: Yoshihiro Imajo, Tetsuro Izawa, Kimitoshi Ohgiichi, Hiroshi Okawara, Shiro Ueda, Nobuyuki Ishige, Tetsuya Kawamura, Hisashi Ishino, Fumiaki Komori
  • Patent number: 6842164
    Abstract: In a liquid crystal display comprising a plurality of pixels each of which has an switching element, a plurality of drain drivers and gate drivers for operating the switching elements and the pixels, and a plurality of drain lines and gate lines supplying signals from the drain drivers and the gate drivers to the switching elements being formed on one of a pair of substrates sandwiching a liquid crystal layer, the present invention provides wiring lines formed on the one of a pair of substrates for transferring display data signals and a clock signal between each pair of the plurality of drain drivers adjacent to one another, and provides at least one gate circuit for at least one of the plurality of drain drivers which is controlled by the clock signal and switches the display data signals and the clock signal either (1) to be acquired by the at least one of the plurality of drain drivers or (2) to be transferred to another of the plurality of drain drivers arranged adjacent to the at least one of the plural
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: January 11, 2005
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yoshihiro Imajo, Tetsuro Izawa, Kimitoshi Ohgiichi, Hiroshi Okawara, Shiro Ueda, Nobuyuki Ishige, Tetsuya Kawamura, Hisashi Ishino, Fumiaki Komori
  • Publication number: 20040233344
    Abstract: A display device having a substrate with a display area and a peripheral area being formed on the substrate. A plurality of signal lines and a plurality of scan lines are arranged in the display area. Six signal line common lines are provided in the peripheral area and at least one of two, three and four scan line common lines are provided in the peripheral area.
    Type: Application
    Filed: June 9, 2004
    Publication date: November 25, 2004
    Inventors: Kimitoshi Ohgiichi, Ryouichi Ootsu, Kazushi Miyata, Shinichi Tsuruoka, Susumu Niwa
  • Publication number: 20040150780
    Abstract: In a liquid crystal display comprising a plurality of pixels each of which has an switching element, a plurality of drain drivers and gate drivers for operating the switching elements and the pixels, and a plurality of drain lines and gate lines supplying signals from the drain drivers and the gate drivers to the switching elements being formed on one of a pair of substrates sandwiching a liquid crystal layer, the present invention provides wiring lines formed on the one of a pair of substrates for transferring display data signals and a clock signal between each pair of the plurality of drain drivers adjacent to one another, and provides at least one gate circuit for at least one of the plurality of drain drivers which is controlled by the clock signal and switches the display data signals and the clock signal either (1) to be acquired by the at least one of the plurality of drain drivers or (2) to be transferred to another of the plurality of drain drivers arranged adjacent to the at least one of the plural
    Type: Application
    Filed: December 30, 2003
    Publication date: August 5, 2004
    Applicant: Hitachi, Ltd. and Hitachi Device Engineering Co., Ltd.
    Inventors: Yoshihiro Imajo, Tetsuro Izawa, Kimitoshi Ohgiichi, Hiroshi Okawara, Shiro Ueda, Nobuyuki Ishige, Tetsuya Kawamura, Hisashi Ishino, Fumiaki Komori
  • Publication number: 20040150603
    Abstract: In a liquid crystal display comprising a plurality of pixels each of which has an switching element, a plurality of drain drivers and gate drivers for operating the switching elements and the pixels, and a plurality of drain lines and gate lines supplying signals from the drain drivers and the gate drivers to the switching elements being formed on one of a pair of substrates sandwiching a liquid crystal layer, the present invention provides wiring lines formed on the one of a pair of substrates for transferring display data signals and a clock signal between each pair of the plurality of drain drivers adjacent to one another, and provides at least one gate circuit for at least one of the plurality of drain drivers which is controlled by the clock signal and switches the display data signals and the clock signal either (1) to be acquired by the at least one of the plurality of drain drivers or (2) to be transferred to another of the plurality of drain drivers arranged adjacent to the at least one of the plural
    Type: Application
    Filed: December 30, 2003
    Publication date: August 5, 2004
    Applicants: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yoshihiro Imajo, Tetsuro Izawa, Kimitoshi Ohgiichi, Hiroshi Okawara, Shiro Ueda, Nobuyuki Ishige, Tetsuya Kawamura, Hisashi Ishino, Fumiaki Komori
  • Patent number: 6750926
    Abstract: Drain driver output terminals (lead lines) are divided into six groups (R1, R2, G1, G2, B1, B2) of positive polarity and negative polarity for three primary colors: respective ones are bundled together for connection to drain line common lines; and then, these drain line common lines are drawn out of a drain driver mount region. Gate driver output terminals (lead lines) are divided into three groups (GA, GB, GC) including a front stage and a next stage plus a rear stage; and respective ones are bundled together for connection to gate line common lines. These gate line common lines are drawn out of a gate driver mount region; and then, tests are preformed with probes attached to test terminals provided at such drain line common lines and gate line common lines.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: June 15, 2004
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Kimitoshi Ohgiichi, Ryouichi Ootsu, Kazushi Miyata, Shinichi Tsuruoka, Susumu Niwa
  • Patent number: 6697040
    Abstract: In a liquid crystal display comprising a plurality of pixels each of which has an switching element, a plurality of drain drivers and gate drivers for operating the switching elements and the pixels, and a plurality of drain lines and gate lines supplying signals from the drain drivers and the gate drivers to the switching elements being formed on one of a pair of substrates sandwiching a liquid crystal layer, the present invention provides wiring lines formed on the one of a pair of substrates for transferring display data signals and a clock signal between each pair of the plurality of drain drivers adjacent to one another, and provides at least one gate circuit for at least one of the plurality of drain drivers which is controlled by the clock signal and switches the display data signals and the clock signal either (1) to be acquired by the at least one of the plurality of drain drivers or (2) to be transferred to another of the plurality of drain drivers arranged adjacent to the at least one of the plural
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: February 24, 2004
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yoshihiro Imajo, Tetsuro Izawa, Kimitoshi Ohgiichi, Hiroshi Okawara, Shiro Ueda, Nobuyuki Ishige, Tetsuya Kawamura, Hisashi Ishino, Fumiaki Komori
  • Patent number: 6583829
    Abstract: A liquid crystal display element includes a pair of substrates, a liquid crystal layer sandwiched therebetween, gate lines and drain lines disposed to intersect the gate lines disposed on one of the substrates, thin film transistors disposed at the intersections of the gate and drain lines, pixel electrodes disposed in an area surrounded by two adjacent gate lines and two adjacent drain lines, a common electrode disposed on the other substrate. The liquid crystal display element is also provided with storage lines disposed below the pixel electrodes with an insulating layer interposed therebetween to form a capacitance therebetween. Each of the pixel electrodes is formed with an opening in a portion thereof facing the storage lines.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: June 24, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Ryouichi Ootsu, Kimitoshi Ohgiichi
  • Publication number: 20010020988
    Abstract: Let drain driver output terminals (lead lines) be divided into six groups (R1, R2, G1, G2, B1, B2) of positive polarity and negative polarity for the three primary colors; bundle respective ones together for connection to drain line common lines; then, draw these drain line common lines out of a drain driver mount region; Let gate driver output terminals (lead lines) be divided into three groups (GA, GB, GC) of a front stage and next stage plus rear stage; bundle respective ones together for connection to gate line common lines; draw these gate line common lines out of a gate driver mount region; and then, perform tests with probes attached to test terminals provided at such drain line common lines and gate line common lines.
    Type: Application
    Filed: March 6, 2001
    Publication date: September 13, 2001
    Inventors: Kimitoshi Ohgiichi, Ryouichi Ootsu, Kazushi Miyata, Shinichi Tsuruoka, Susumu Niwa
  • Publication number: 20010019372
    Abstract: A liquid crystal display element includes a pair of substrates, a liquid crystal layer sandwiched therebetween, gate lines and drain lines disposed to intersect the gate lines disposed on one of the substrates, thin film transistors disposed at the intersections of the gate and drain lines, pixel electrodes disposed in an area surrounded by two adjacent gate lines and two adjacent drain lines, a common electrode disposed on the other substrate. The liquid crystal display element is also provided with storage lines disposed below the pixel electrodes with an insulating layer interposed therebetween to form a capacitance therebetween. Each of the pixel electrodes is formed with an opening in a portion thereof facing the storage lines.
    Type: Application
    Filed: March 5, 2001
    Publication date: September 6, 2001
    Applicant: Hitachi, Ltd
    Inventors: Ryouichi Ootsu, Kimitoshi Ohgiichi
  • Publication number: 20010015709
    Abstract: In a liquid crystal display comprising a plurality of pixels each of which has an switching element, a plurality of drain drivers and gate drivers for operating the switching elements and the pixels, and a plurality of drain lines and gate lines supplying signals from the drain drivers and the gate drivers to the switching elements being formed on one of a pair of substrates sandwiching a liquid crystal layer, the present invention provides wiring lines formed on the one of a pair of substrates for transferring display data signals and a clock signal between each pair of the plurality of drain drivers adjacent to one another, and provides at least one gate circuit for at least one of the plurality of drain drivers which is controlled by the clock signal and switches the display data signals and the clock signal either (1) to be acquired by the at least one of the plurality of drain drivers or (2) to be transferred to another of the plurality of drain drivers arranged adjacent to the at least one of the plural
    Type: Application
    Filed: February 13, 2001
    Publication date: August 23, 2001
    Applicant: Hitachi, Ltd.
    Inventors: Yoshihiro Imajo, Tetsuro Izawa, Kimitoshi Ohgiichi, Hiroshi Okawara, Shiro Ueda, Nobuyuki Ishige, Tetsuya Kawamura, Hisashi Ishino, Fumiaki Komori
  • Patent number: 5748179
    Abstract: A liquid crystal display device is provided which reduces the resistance of input wires disposed between a flexible board and driving ICs mounted in a flip-chip style, and enhances resistance against electrocorrosion of input terminals thereof. The liquid crystal display device includes two transparent insulating substrates (SUB1, SUB2) confronting each other through a liquid crystal layer, plural liquid crystal driving circuits (ICs) mounted in a flip-chip style on a surface of one of the substrates located at the side of the liquid crystal layer, a flexible board (FPC) for inputting a signal to each of the liquid crystal driving circuits, and plural input wires (Td) provided on the surface of the one substrate at the side of the liquid crystal layer to connect output terminals of the flexible board to input terminals of the liquid crystal driving circuits.
    Type: Grant
    Filed: May 13, 1996
    Date of Patent: May 5, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hikaru Ito, Masataka Natori, Masahiko Suzuki, Kimitoshi Ohgiichi, Kuniyuki Matsunaga, Junichi Ohwada, Masumi Sasuga, Shiro Ueda
  • Patent number: 5739880
    Abstract: In a liquid crystal display in which the region around a display region is reduced, a black matrix BM is made of a colored organic resin. Substantially all over the periphery of a seal member SL, there are formed portions in which the seal member SL and the black matrix BM are and are not overlapped. A shielding tape TAPE is stuck to that portion of the lower face of a lower transparent glass substrate SUB1, which corresponds to the non-overlapped portion, to prevent the leakage of light from the seal portion.
    Type: Grant
    Filed: November 29, 1996
    Date of Patent: April 14, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Masahiko Suzuki, Tsutomu Isono, Kimitoshi Ohgiichi, Akira Ishii, Jun-ichi Ohwada