Abstract: An electronic component is provided that includes a substrate having a top side and a bottom side. The substrate defines a horizontal xy-plane and a vertical z-direction that is perpendicular to the xy-plane. An ASIC die is provided having a top side and a bottom side that is attached to the top side of the substrate. Moreover, a MEMS die is provided that includes a top part and a bottom part, the bottom part including at least one horizontal surface and at least one non-horizontal surface. An adhesive layer extends from the top side of the ASIC die to the horizontal surface and to a portion of the non-horizontal surface of the bottom part of the MEMS die. A bonding pad is attached to the top side of the ASIC die adjacent to the adhesive layer. An electrical connection extends from the bonding pad to the MEMS die.

Abstract: A device is provided that includes a substrate defined as a horizontal xy-plane and a vertical z-direction perpendicular to the horizontal xy-plane. The substrate includes a second and first side. The device may include a conductor region and a chip region in the horizontal xy-plane. The device may include one or more chips attached to the at least one chip region on the substrate. The device may include a packaging layer including a second side and a first side, wherein the second side of the packaging layer is attached to the first side of the substrate, wherein the packaging layer further includes one or more cavities in the at least one conductor region, and the one or more cavities extend from the first side of the packaging layer to the second side of the packaging layer, and wherein each of the one or more cavities contains a gas.

Abstract: This disclosure describes an electronic component comprising a package with a top side and a bottom side and at least one electronic chip housed within an enclosure inside the package. The package comprises a package base on its top side and a metallic cap on its bottom side. At least one electronic chip is separated from the metallic cap by a gap and the metallic cap is attached to the package base to form an enclosure.

Abstract: This disclosure describes an electronic component with a package body which comprises a set of sidewalls and a bottom wall. One or more chip mounting elements extend into the space within the package from the inner surface of at least one sidewall, and at least one electronic chip is attached to the chip mounting elements. The electronic component also comprises one or more stiffening elements which extend inside the space within the package from the inner surface of one of the sidewalls to the outer surface of the bottom wall. These stiffening elements are separated from the one or more chip mounting elements inside the enclosed inner space.

Abstract: An electronic component comprising a plastic package and an electric chip which is inside the package. The electronic component comprises a metallic die pad and a metallic first support structure extends from the die pad to a first support point on one of the side surfaces of the plastic package. The electronic component also comprises a metallic opposing pad and a metallic second support structure which extends from the opposing pad to a second support point on one of the side surfaces of the plastic package.

Abstract: This disclosure describes an electronic component with a package body which comprises a set of sidewalls and a bottom wall. One or more chip mounting elements extend into the space within the package from the inner surface of at least one sidewall, and at least one electronic chip is attached to the chip mounting elements. The electronic component also comprises one or more stiffening elements which extend inside the space within the package from the inner surface of one of the sidewalls to the outer surface of the bottom wall. These stiffening elements are separated from the one or more chip mounting elements inside the enclosed inner space.

Abstract: This disclosure describes an electronic component comprising a package with a top side and a bottom side and at least one electronic chip housed within an enclosure inside the package. The package comprises a package base on its top side and a metallic cap on its bottom side. At least one electronic chip is separated from the metallic cap by a gap and the metallic cap is attached to the package base to form an enclosure.

Abstract: A mixed-signal multi-chip package comprises a lead frame, a first die, and a digital die. The first die can provide an analog signal in an analog chip pad of the first die. The digital die can receive the analog signal from the first die through an analog chip pad. The analog input chip pad is coupled with the respective analog output chip pad of the first die by a first bonding wire. The digital die is configured to communicate with external circuitry using a digital signal-bearing signal exchanged via at least one first bond pad of the lead-frame. A second bond pad of the lead frame configured to be coupled to a DC voltage extends laterally along a plane of the lead-frame between the first bond pad and the first bonding wire, to form a DC guard between the first bond pad and the first bonding wire.

Abstract: A mixed-signal multi-chip package comprises a lead frame, a first die, and a digital die. The first die can provide an analog signal in an analog chip pad of the first die. The digital die can receive the analog signal from the first die through an analog chip pad. The analog input chip pad is coupled with the respective analog output chip pad of the first die by a first bonding wire. The digital die is configured to communicate with external circuitry using a digital signal-bearing signal exchanged via at least one first bond pad of the lead-frame. A second bond pad of the lead frame configured to be coupled to a DC voltage extends laterally along a plane of the lead-frame between the first bond pad and the first bonding wire, to form a DC guard between the first bond pad and the first bonding wire.

Abstract: A semiconductor assembly includes a semiconductor package. An essentially planar portion of a die attach paddle is disposed above a semiconductor die. The planar portion forms a plane of the paddle. The area of the planar portion is greater than a combined area of an orthogonal projection of the die on the plane of the paddle. The planar portion is coupled via bond pads to first leads of the lead-frame. The first leads are configured to be coupled to a ground potential so that the planar portion forms a first ground plane inside the semiconductor package above the die. A second ground plane is disposed on the face of the printed circuit board that resides towards the semiconductor package. The second ground plane is coplanar with the plane of the paddle, and disposed under the body of the semiconductor package.

Abstract: A MEMS component package comprises a body having outer surfaces of non-conductive material and a plurality of conducting leads protruding therefrom. A solder pad is applied on a blind pad exposed on a PCB surface while applying solder paste. The blind pad is collocated with an intended location of the body, and the solder pad is collocated with the blind pad. The package is placed on the PCB surface, joining the leads to the pin pads of the PCB with solder paste. The PCB is heated to melt the paste. This couples the leads to the pin pads, and melts the solder pad. The melting transforms the solder pad into a solder bump configured to couple the body to the at least one blind pad. The solder bump attaches with a non-galvanic contact directly to the non-conductive plastic bottom of the body.