Abstract: An integrated circuit system comprises first and second processing modules. The first processing module comprises a first processor, clock and memory; and the second processing module comprises a second processor, clock and memory. The first processing module sends a time-mark signal to the second processing module and stores to the first memory a first value of the first clock at which the signal was sent. The second processing module stores to the second memory a second value of the second clock at which the signal was received. The first processing module sends a command to the second processing module, wherein said command includes an execution time for a task relative to the first value. The second processing module determines the execution time for said task relative to the second value and executes said task at said execution time.

Abstract: An integrated circuit system comprises first and second processing modules. The first processing module comprises a first processor, clock and memory; and the second processing module comprises a second processor, clock and memory. The first processing module sends a time-mark signal to the second processing module and stores to the first memory a first value of the first clock at which the signal was sent. The second processing module stores to the second memory a second value of the second clock at which the signal was received. The first processing module sends a command to the second processing module, wherein said command includes an execution time for a task relative to the first value. The second processing module determines the execution time for said task relative to the second value and executes said task at said execution time.

Abstract: A radio frequency transceiver device comprises a control register unit including one or more registers and a central processing unit arranged to access the one or more registers via a memory bus. The device also comprises a sequencer module comprising one or more configuration registers connected to the central processing unit via a control bus and also comprises one or more trigger inputs. A sequencer memory module is connected to the sequencer module and is arranged to store one or more read/write commands comprising instructions to read from and/or write to the registers within the control register unit. The sequencer module is arranged such that upon receiving a trigger event via at least one of the one or more trigger inputs, it executes the one or more read/write commands.

Abstract: A radio frequency transceiver device comprises a control register unit including one or more registers and a central processing unit arranged to access the one or more registers via a memory bus. The device also comprises a sequencer module comprising one or more configuration registers connected to the central processing unit via a control bus and also comprises one or more trigger inputs. A sequencer memory module is connected to the sequencer module and is arranged to store one or more read/write commands comprising instructions to read from and/or write to the registers within the control register unit. The sequencer module is arranged such that upon receiving a trigger event via at least one of the one or more trigger inputs, it executes the one or more read/write commands.