Abstract: Provided is a scan driving circuit including a plurality of unit scan driving circuits, at least one of the plurality of unit scan driving circuits including: a first transistor configured to receive a prior scan signal in synchronization with a first clock signal and to respond to an enable level of the prior scan signal to output a second clock signal as a corresponding scan signal during one cycle of the first clock signal; a second transistor coupled between the first transistor and a first voltage; and a third transistor coupled to a gate of the second transistor and configured to be turned on by a first signal. A width of a first wire configured to transfer the first clock signal and a width of a second wire configured to transfer the second clock signal are larger than that of a third wire configured to transfer the first signal.

Abstract: Provided is a scan driving circuit including a plurality of unit scan driving circuits, at least one of the plurality of unit scan driving circuits including: a first transistor configured to receive a prior scan signal in synchronization with a first clock signal and to respond to an enable level of the prior scan signal to output a second clock signal as a corresponding scan signal during one cycle of the first clock signal; a second transistor coupled between the first transistor and a first voltage; and a third transistor coupled to a gate of the second transistor and configured to be turned on by a first signal. A width of a first wire configured to transfer the first clock signal and a width of a second wire configured to transfer the second clock signal are larger than that of a third wire configured to transfer the first signal.

Abstract: An organic light-emitting diode (OLED) display includes a data line disposed on a substrate and extended in a first direction, a power line disposed on the substrate and extended in the first direction, a scan signal line disposed on the substrate across the data line, an active layer formed over the substrate, wherein the active layer includes first to fourth regions, wherein the first and fourth regions are connected to each other through a connecting region, a first transistor including the active layer formed between the first region and the second region, a second transistor including the active layer formed between the third region and the fourth region, and wherein the active layer is extended from the first region, the organic light emitting diode is electrically coupled to the first transistor, and a storage capacitor including a first electrode and a second electrode formed over the first electrode.

Abstract: An organic light-emitting diode (OLED) display includes a data line disposed on a substrate and extended in a first direction, a power line disposed on the substrate and extended in the first direction, a scan signal line disposed on the substrate across the data line, an active layer formed over the substrate, wherein the active layer includes first to fourth regions, wherein the first and fourth regions are connected to each other through a connecting region, a first transistor including the active layer formed between the first region and the second region, a second transistor including the active layer formed between the third region and the fourth region, and wherein the active layer is extended from the first region, the organic light emitting diode is electrically coupled to the first transistor, and a storage capacitor including a first electrode and a second electrode formed over the first electrode.

Abstract: Provided is a scan driving circuit including a plurality of unit scan driving circuits, at least one of the plurality of unit scan driving circuits including: a first transistor configured to receive a prior scan signal in synchronization with a first clock signal and to respond to an enable level of the prior scan signal to output a second clock signal as a corresponding scan signal during one cycle of the first clock signal; a second transistor coupled between the first transistor and a first voltage; and a third transistor coupled to a gate of the second transistor and configured to be turned on by a first signal. A width of a first wire configured to transfer the first clock signal and a width of a second wire configured to transfer the second clock signal are larger than that of a third wire configured to transfer the first signal.

Abstract: An organic light-emitting diode (OLED) display is disclosed.

Abstract: Provided is a scan driving circuit including a plurality of unit scan driving circuits, at least one of the plurality of unit scan driving circuits including: a first transistor configured to receive a prior scan signal in synchronization with a first clock signal and to respond to an enable level of the prior scan signal to output a second clock signal as a corresponding scan signal during one cycle of the first clock signal; a second transistor coupled between the first transistor and a first voltage; and a third transistor coupled to a gate of the second transistor and configured to be turned on by a first signal. A width of a first wire configured to transfer the first clock signal and a width of a second wire configured to transfer the second clock signal are larger than that of a third wire configured to transfer the first signal.

Abstract: An organic light-emitting diode (OLED) display is disclosed.

Abstract: An organic light-emitting diode (OLED) display is disclosed.

Abstract: Provided is a scan driving circuit including a plurality of unit scan driving circuits, at least one of the plurality of unit scan driving circuits including: a first transistor configured to receive a prior scan signal in synchronization with a first clock signal and to respond to an enable level of the prior scan signal to output a second clock signal as a corresponding scan signal during one cycle of the first clock signal; a second transistor coupled between the first transistor and a first voltage; and a third transistor coupled to a gate of the second transistor and configured to be turned on by a first signal. A width of a first wire configured to transfer the first clock signal and a width of a second wire configured to transfer the second clock signal are larger than that of a third wire configured to transfer the first signal.

Abstract: Provided is a scan driving circuit including a plurality of unit scan driving circuits, at least one of the plurality of unit scan driving circuits including: a first transistor configured to receive a prior scan signal in synchronization with a first clock signal and to respond to an enable level of the prior scan signal to output a second clock signal as a corresponding scan signal during one cycle of the first clock signal; a second transistor coupled between the first transistor and a first voltage; and a third transistor coupled to a gate of the second transistor and configured to be turned on by a first signal. A width of a first wire configured to transfer the first clock signal and a width of a second wire configured to transfer the second clock signal are larger than that of a third wire configured to transfer the first signal.

Abstract: An organic light-emitting diode (OLED) display is disclosed.

Abstract: An organic light-emitting diode (OLED) display is disclosed.

Abstract: An organic light-emitting diode (OLED) display is disclosed.

Abstract: An organic light-emitting diode (OLED) display is disclosed.

Abstract: An organic light-emitting diode (OLED) display is disclosed.

Abstract: An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a substrate and an active pattern formed over the substrate and including first to fourth regions, the first and fourth regions connected to each other. The display also includes a gate insulation layer formed over the active pattern, and a first gate electrode formed over the gate insulation layer. The first gate electrode, the first region and the second region define a first transistor. The display also includes a second gate electrode formed over the gate insulation layer, and the second gate electrode, the third region and the fourth region define a second transistor. The display also includes a first insulating interlayer formed over the first and second gate electrodes and a conductive pattern formed over the first insulating interlayer. An OLED is configured to receive a driving current from the first transistor.

Abstract: Provided is a scan driving circuit including a plurality of unit scan driving circuits, at least one of the plurality of unit scan driving circuits including: a first transistor configured to receive a prior scan signal in synchronization with a first clock signal and to respond to an enable level of the prior scan signal to output a second clock signal as a corresponding scan signal during one cycle of the first clock signal; a second transistor coupled between the first transistor and a first voltage; and a third transistor coupled to a gate of the second transistor and configured to be turned on by a first signal. A width of a first wire configured to transfer the first clock signal and a width of a second wire configured to transfer the second clock signal are larger than that of a third wire configured to transfer the first signal.

Abstract: A dual display and electronic device having the same are disclosed. In one aspect, the dual display includes first and display panels, first and second data drivers, first and second switches, and a power supply. The second data driver does not operate when a first emission driver disable control signal is transmitted to the second emission driver. The first data driver does not operate when a second emission driver disable control signal is transmitted to the first emission driver.

Abstract: Provided is a scan driving circuit including a plurality of unit scan driving circuits, at least one of the plurality of unit scan driving circuits including: a first transistor configured to receive a prior scan signal in synchronization with a first clock signal and to respond to an enable level of the prior scan signal to output a second clock signal as a corresponding scan signal during one cycle of the first clock signal; a second transistor coupled between the first transistor and a first voltage; and a third transistor coupled to a gate of the second transistor and configured to be turned on by a first signal. A width of a first wire configured to transfer the first clock signal and a width of a second wire configured to transfer the second clock signal are larger than that of a third wire configured to transfer the first signal.