Patents by Inventor Kin P. Tsui

Kin P. Tsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8134233
    Abstract: A method and apparatus for forming controlled stress fractures in metal produces electrically isolated, closely spaced circuit sub-entities for use on a metallized printed wiring board. A polymeric substrate has a layer of metal adhered to the surface, and the metal layer is formed into entities. Each entity has a fracture initiating feature formed into it, which serves to initiate and/or direct a stress crack that is induced in the metal. The entities are fractured in a controlled manner by subjecting the substrate and the entities to mechanical stress by a rapid thermal excursion, creating a stress fracture in the entity extending from the fracture initiating feature. The stress fracture divides each entity into two or more sub-entities that are electrically isolated from each other by the stress fracture. The resulting structure can be used to form circuitry requiring very fine spaces for high density printed circuit boards.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: March 13, 2012
    Assignee: Motorola Solutions, Inc.
    Inventors: Jerzy Wielgus, Daniel R. Gamota, Tomasz L. Klosowiak, John B. Szczech, Kin P. Tsui
  • Patent number: 7780345
    Abstract: A method and apparatus for an irreversible temperature sensor for measuring a peak exposure temperature. The apparatus is fabricated by printing an admixture of conductive nanoparticles on a dielectric substrate to form a film. The film has an electrical resistance that is inversely proportional to the exposure temperature. The electrical resistance also irreversibly decreases as the exposure temperature of the film increases. A portion of the film is exposed to a pulse of electromagnetic energy sufficient to render it substantially more electrically conductive than the portion that was not exposed. In use, the peak exposure temperature is determined by measuring the electrical resistance of the non-altered portion of the film and the electrical resistance of the portion that was exposed to the pulse of electromagnetic energy, and subtracting the electrical resistance of the altered portion from the electrical resistance of the portion that was not altered, to provide a difference value.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: August 24, 2010
    Assignee: Motorola, Inc.
    Inventors: Jerzy Wielgus, Daniel R. Gamota, John B. Szczech, Kin P. Tsui, Jie Zhang
  • Publication number: 20090161727
    Abstract: A method and apparatus for an irreversible temperature sensor for measuring a peak exposure temperature. The apparatus is fabricated by printing an admixture of conductive nanoparticles on a dielectric substrate to form a film. The film has an electrical resistance that is inversely proportional to the exposure temperature. The electrical resistance also irreversibly decreases as the exposure temperature of the film increases. A portion of the film is exposed to a pulse of electromagnetic energy sufficient to render it substantially more electrically conductive than the portion that was not exposed. In use, the peak exposure temperature is determined by measuring the electrical resistance of the non-altered portion of the film and the electrical resistance of the portion that was exposed to the pulse of electromagnetic energy, and subtracting the electrical resistance of the altered portion from the electrical resistance of the portion that was not altered, to provide a difference value.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 25, 2009
    Applicant: MOTOROLA, INC.
    Inventors: Jerzy Wielgus, Daniel R. Gamota, John B. Szczech, Kin P. Tsui, Jie Zhang
  • Patent number: 7550998
    Abstract: An inverter circuit (500) having a drive transistor (102) that operably couples to a voltage bias input (101) (and where that drive transistor controls the inverter circuit output by opening and closing a connection between the output (105) and ground (104)) is further operably coupled to a feedback switch (401). In a preferred approach the feedback switch is itself also operably coupled to the voltage bias input and the output and preferably serves, when the drive transistor is switched “off,” to responsively couple the voltage bias input to the drive transistor in such a way as to cause a gate terminal of the drive transistor to have its polarity relative to a source terminal of the drive transistor reversed and hence permit the inverter circuit to operate across a substantially full potential operating range of the drive transistor.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: June 23, 2009
    Assignee: Motorola, Inc.
    Inventors: Paul W. Brazis, Daniel R. Gamota, Kin P. Tsui, John B. Szczech, Jie Zhang
  • Publication number: 20090080233
    Abstract: A printed read only memory (ROM) device that consists of an array of memory resistors, a reference resistor, and analog-to-digital circuit is disclosed. Resistance values are dependent on the data to be stored in the read only memory. During read operation, a resistor in the array is powered, activating a voltage divider between the powered resistor and the reference resistor. The analog-to-digital circuit will read the divided voltage level between the two resistors, compare the voltage supply level and interpret it into bits of memory data. During the manufacturing of the ROM circuit, an array of memory resistors is printed as the means for storage of the data. Resistive inks of specific resistance values are selected and printed in a preferred layout that includes a reference resistor coupled to the determined array of memory resistors and an analog to digital converter so as to form a read only memory with the received data.
    Type: Application
    Filed: September 21, 2007
    Publication date: March 26, 2009
    Applicant: Motorola, Inc.
    Inventors: Kin P. TSUI, Daniel R. GAMOTA, Kristina KALYANASUNDARAM, John B. SZCZECH, Xiangcheng TANG, Jerzy WIELGUS, Jie ZHANG
  • Publication number: 20090033631
    Abstract: An apparatus having an electronic drawing surface includes a common electrode overlying a least part of the outer surface of a housing, or other object, and a bistable media layer overlying the common electrode. The bistable media layer has at least two stable states and is operable to assume a first stable state in the region of a drawing tool when an electrical voltage difference is generated between the drawing tool and the common electrode. The voltage difference produces an electrical field across a region of the bistable media layer when the drawing tool is in close proximity to the bistable layer. Optionally, an outer surface of a plurality of transparent electrodes overlies the bistable media layer.
    Type: Application
    Filed: July 30, 2007
    Publication date: February 5, 2009
    Applicant: MOTOROLA, INC.
    Inventors: Kin P. Tsui, Daniel R. Gamota, Krishna Kalyanasundaram, John B. Szczech, Jerzy Wieglus
  • Publication number: 20090034215
    Abstract: A method and apparatus for forming controlled stress fractures in metal produces electrically isolated, closely spaced circuit sub-entities for use on a metallized printed wiring board. A polymeric substrate has a layer of metal adhered to the surface, and the metal layer is formed into entities. Each entity has a fracture initiating feature formed into it, which serves to initiate and/or direct a stress crack that is induced in the metal. The entities are fractured in a controlled manner by subjecting the substrate and the entities to mechanical stress by a rapid thermal excursion, creating a stress fracture in the entity extending from the fracture initiating feature. The stress fracture divides each entity into two or more sub-entities that are electrically isolated from each other by the stress fracture. The resulting structure can be used to form circuitry requiring very fine spaces for high density printed circuit boards.
    Type: Application
    Filed: July 30, 2007
    Publication date: February 5, 2009
    Applicant: MOTOROLA, INC.
    Inventors: Jerzy Wieglus, Daniel R. Gamota, Tomasz L. Klosowiak, John B. Szczech, Kin P. Tsui