Abstract: A system for communicating information includes a variable gain amplifier (VGA) responsive to an input signal and a gain control signal for controlling a gain of the VGA. The system also includes a power amplifier responsive to the VGA. An output power level of the power amplifier is compared to a predetermined reference value to generate the gain control signal. The gain control signal is offset by a gain offset value. To change the output power level of the power amplifier from a first output power level to a second output power level, a first predetermined reference value and a first gain offset value associated with the first output power level are changed substantially concurrently to a second predetermined reference value and a second gain offset value, respectively, associated with the second output power level.

Abstract: A low noise amplifier (LNA) comprises an input stage to amplify an input signal, the input stage having a transconductance that has reduced gain variations in response to changes in process and environmental conditions. The input stage includes a first transistor. A second transistor communicates with the first transistor. A bias circuit biases the first transistor in a triode region and the second transistor in a saturation region, wherein an input of the LNA communicates with a control terminal of the first transistor.

Abstract: A circuit that eliminates an off-chip inductive component connected between an integrated circuit (IC) arranged on a package and an external load comprises a package and an IC that is arranged on the package. A first bondwire arranged on the package has one end that communicates with the external load and an opposite end that communicates with the IC. A second bondwire located on the package has one end that communicates with the external load and an opposite end that communicates with the IC.

Abstract: A packet-based wireless transceiver that transmits and receives data packets includes a transceiver component having an adjustable performance parameter. A calibration circuit adjusts the performance parameter of the transceiver component at times synchronized with the data packets. A calibration signal generator generates calibration signals based on the performance parameter and outputs the calibration signals to the transceiver component. A comparator receives the outputs of the transceiver component and generates a difference signal. A calibration adjustment circuit communicates with the calibration signal generator and the comparator and adjusts the performance parameter to reduce the difference signal. Alternately, a reference signal generator generates a reference signal. A comparator receives the reference signal and a second signal from the transceiver component and generates a difference signal.

Abstract: An electrostatic discharge (ESD) protection circuit is provided for protecting transistors of an integrated circuit (IC) from ESD. The ESD protection circuit includes n transistors with n gates and less than n drains where n is an integer greater than 1. At least m resistors have first ends that communicate with at least one of the transistors of the IC, a blocking capacitor of the IC, an input pad of the IC, and an output pad of the IC, and second ends that connect to corresponding drain terminals of said drains where m is an integer greater than or equal to n/2.

Abstract: An impedance matching circuit is provided for an IC arranged on a package that matches an impedance of an external load. The circuit includes a package, an IC that is arranged on the package, and an impedance matching circuit. The impedance matching circuit includes a first bondwire arranged on the package that has one end that communicates with the external load and an opposite end that communicates with said IC, a capacitance element arranged on the IC, and a second bondwire arranged on the package that has one end that communicates with the external load and an opposite end that communicates with one end of said capacitance element.

Abstract: An amplifier with adjustable (pre)distortion, a predistortion adjustment circuit, systems and networks including such amplifiers and circuits, and methods for adjusting (pre)distortion in an analog amplifier. The amplifier architecture generally includes (a) a predistortion circuit configured to (i) select a value for a predistortion function from a plurality of different predistortion values, and (ii) apply the selected predistortion value to an input signal to generate a predistorted input signal; (b) an amplifier configured to amplify the predistorted input signal and provide an output signal therefrom; and (c) an adjustment circuit configured to adjust selection of the predistortion function value in response to a predetermined parameter value of the amplifier. By adjusting the predistortion function, the amplifier provides an output signal in a linear power range over a range of amplifier parameter values and avoids overcompensation that can occur when the predistortion signal is not adjustable.

Abstract: A gain calibration circuit for a radio frequency mixer in a wireless transceiver includes a reference signal generator that generates a reference signal. A comparator receives the reference signal and a second signal that is proportional to current flowing through the transmitter mixer and generates a difference signal. An adjustment circuit adjusts a transconductance gain of the mixer based on the difference signal. The adjustment circuit includes a plurality of binary weighted transconductance cells. The transconductance gain is calibrated during idle time between data packets or after power on, hardware reset, or software reset.

Abstract: An LNA comprising an input stage to amplify an input signal. The input stage has a high linear transconductance that has reduced gain variations in response to changes in process and environmental conditions.

Abstract: An input circuit for an integrated circuit (IC), which is mounted on a package having an input pin, rejects signal energy at a first frequency. A first bondwire arranged on the package has one end that communicates with the pin and an opposite end that communicates with components of the IC. A second bondwire located on the package has one end that communicates with the pin and an opposite end that communicates with a capacitance. The capacitance and an inductance of the first and second bondwires resonate at the first frequency to reject signal energy at the first frequency. Bondwires are also used to eliminate external components such as resonant components and impedance matching circuits to reduce cost.

Abstract: An input circuit for an integrated circuit (IC), which is mounted on a package having an input pin, rejects signal energy at a first frequency. A first bondwire arranged on the package has one end that communicates with the pin and an opposite end that communicates with components of the IC. A second bondwire located on the package has one end that communicates with the pin and an opposite end that communicates with a capacitance. The capacitance and an inductance of the first and second bondwires resonate at the first frequency to reject signal energy at the first frequency. Bondwires are also used to eliminate external components such as resonant components and impedance matching circuits to reduce cost.