Abstract: The specification describes a recessed chip IC package in which the IC chip is bonded to a silicon translator, and power and ground planes for IC power and ground interconnections are formed on separate interconnect levels of the translator. The multilevel interconnection capability of the translator allows crossovers, and allows power and ground pins from the IC chip to be both isolated from signal I/Os, and consolidated into fewer interconnections going to the next board level. The thermal mismatch between the silicon translator and conventional printed wiring board materials is addressed by using an interposer which is essentially a ball grid array of plated-through holes that transfers the interconnect pattern from the translator to the printed wiring board. The interposer may have a composition with a coefficient of thermal expansion (CTE) that lies between the CTE of silicon and the CTE of the board material. It may also be provided with holes or slots for additional stress relief.

Abstract: The specification describes a recessed chip IC package in which the IC chip is bonded to a translator, and power and ground planes for IC power and ground interconnections are formed on separate interconnect levels of the translator. The multilevel interconnection capability of the translator allows crossovers, and allows power and ground pins from the IC chip to be both isolated from signal I/Os, and consolidated into fewer interconnections going to the next board level. The translator also has a large area outboard of the IC chip area to allow fan out from high pin count chips to large pitch interconnection sites for interconnection to the next board level.

Abstract: The specification describes techniques for attaching double sided circuit boards having plated through holes to interconnection substrates using solder bump arrays. The through holes are filled with a high melting point solder which allows solder bumps to be located directly on the through hole thus saving board area and reducing the interconnection length.

Abstract: A multichip module is assembled using flip-chip bonding technology, a stencil printable solder paste and standard surface mount equipment for interconnecting signaling input/output contact pads on devices within such multichip module.

Abstract: An MCM including a resonator made using conventional MCM fabrication techniques. The MCM's resonator is constructed with overlapping first and second spiral-shaped regions of metallic material separated by a layer of dielectric material. A via disposed in the layer of dielectric material, couples the spiral-shaped regions of metallic material together, thereby utilizing self winding and internal capacitance to gain resonance at frequencies between 500 MHz to 3GHz. The internal capacitance is increased by controlling the overlap between the first and second spiral-shaped regions of metallic material. On a high-resistivity substrate, the monolithic resonator achieves a Q of at least 19 at approximately 900MHz and at least 24 at approximately 2GHz.

Abstract: A thin film capacitor for use in semiconductor integrated circuit devices such as analog circuits, rf circuits, and dynamic random access memories (DRAMs), and a method for its fabrication, is disclosed. The capacitor has a dielectric thickness less than about 50 nm, a capacitance density of at least about 15 fF/.mu.m.sup.2, and a breakdown field of at least about 1 MV/cm. The dielectric material is a metal oxide of either titanium, niobium, or tantalum. The metal oxide can also contain silicon or nitrogen. The dielectric material is formed over a first electrode by depositing the metal onto the substrate or onto a first electrode formed on the substrate. The metal is then anodically oxidized to form the dielectric material of the desired thickness. A top electrode is then formed over the dielectric layer. The top electrode is a metal that does not degrade the electrical characteristics (e.g. the leakage current or the breakdown voltage) of the dielectric layer.

Abstract: An apparatus is provided that improves memory storage and access speed by repackaging various types of memories, SRAM, DRAM, and Disk, into a single storage unit. Each unit contains a slice of all the various memories along with programmable logic to control the accessing of the memories. This unit appears to the central processing unit (CPU) of a computer system as an extremely large secondary cache. Independent management of each unit greatly reduces bus traffic to implement any particular address space. By using a plurality of these memory units, an extremely large amount of memory can be accessed by the CPU with the speed of accessing a cache system.

Abstract: The specification describes techniques for attaching double sided circuit boards having plated through holes to interconnection substrates using solder bump arrays. The through holes are filled with a high melting point solder which allows solder bumps to be located directly on the through hole thus saving board area and reducing the interconnection length.

Abstract: The specification describes an interconnect strategy for memory chip packages to reduce or eliminate alpha particle contamination from the use of high lead solder interconnections in the vicinity of semiconductor memory cells. In the primary embodiment a high tin solder is recommended. A multi-layer under bump metallization is described that is compatible with high tin solders and flip-chip solder bump technology.

Abstract: In accordance with the invention, a thin film capacitor including a dielectric of nitrogen or silicon-doped tantalum oxide and at least one electrode including chromium. Preferably the capacitor is fabricated by anodically oxidizing TaN.sub.x or Ta.sub.2 Si and forming a Cr counterelectrode. The method is fully compatible with MCM processing. It produces anodic Ta.sub.2 O.sub.5 capacitors having exceptionally low leakage currents (<1 nA/cm.sup.2 at 10 V), high breakdown fields (>4 MV/cm) and high capacitance densities (70 nF/cm.sup.2). The devices are stable at 350.degree. C. with excellent capacitor properties and are particularly useful as thin film capacitors of large area (>1 mm.sup.2).

Abstract: The specification describes a MCM IC package with improved RF grounding. The package has at least one RF IC chip bonded to an interconnect substrate and the substrate is interconnected to an intermediate printed wiring board (IPWB). The IPWB is interconnected in turn to a system printed wiring board (SPWB). The RF IC chip is metallized on the backside, and is flip chip bonded directly to the SPWB thereby eliminating two intermediate interconnections and reducing the impedance of the interconnection between the RF chip and the SWBP.

Abstract: The present inventors have discovered that fine patterns of metal or insulator can be formed on printed circuit board using conventional lithographic steppers with inverted projection lenses. The inverted projection lenses act as enlargement lenses rather than reducing lenses and exhibit a large depth of focus sufficient to accommodate the deviations of PC board from planarity. The inverted lens reduces the size of the image needed at the mask, permitting multiple mask levels to be combined on a single glass. This reduces the cost of the mask set and permits the use of smaller glass masks having greater accuracy and dimensional stability than the convention mylar masks used for PC board.By inverting the projection lenses on near-obsolete steppers, applicants were able to form metal patterns on PC board of finer dimension than heretofore reported. Inverting a 5.times. ZEISS lens on a GCA 6300A stepper, applicants were able to form vias of less than 25 .mu.

Abstract: A silicon-on-silicon dual MCM apparatus comprising a printed circuit board having a voltage isolation boundary contained therein supporting a pair of multi-chip modules on either side of the voltage isolation boundary. The MCMs safely convey signals across the isolation boundary via discrete optical coupling means or the like. The optical coupling means allow safe and efficient conveyance of signals across the voltage isolation boundary enabling a designer to group high voltage components on one side of the boundary and low voltage components on the other side of the boundary. This obviates to a degree the need for multi-layered PCBs. A relatively large number of passive components (resistors and capacitors) are integrated into a silicon substrate with flip-chip analog integrated circuits (ICs). Operational characteristics of the controller are verified after integration and are compared to the discrete version.

Abstract: Only one or only a few channels are sent at a time from circuitry located in a curbside box, via a link such as either a coaxial or a fiber cable, into a customer's home TV set or personal computer. However, many more than a few channels are delivered to the curbside box, via a link such as a fiber or a coaxial cable, from a central office or a central bank of paid video-movies to be selected by the customers. Thus whereas the link from the central office or central bank is relatively broad-band (e.g. 500 MHz to 1,000 MHz), the cable from the curbside to the home (or any other kind of building) can be relatively narrow-band (e.g., 5 MHz to 50 MHz). The curbside box serves a multitude of homes--a separate (narrow-band) cable running to each home from the (same) curbside switch. Each channel can be a free radio or free TV channel, a stored or an on-line newspaper pay channel, or a pay TV channel, or a pay-per-view channel (i.e.