Abstract: An electronic board design includes a programmable logic device (PLD) and involves optimizing the routing of traces to the pins of the device. A graphic utility of an electronic design automation tool presents an image of the device to a board designer showing physical pin locations and I/O element names. The designer selects a pin to swap by highlighting it. The software applies rule sets and algorithms supplied by the device manufacturer to determine with which other pin of the device the selected pin may be swapped. Results indicate those pins that are compatible, those pins that would be a risky swap, and those swaps that are not allowed. The software highlights in the graphic utility the results by changing the color of the various pins that may or may not be swapped. The board designer can perform the swap and recompile immediately. Input to the software and output from the software can be textual instead of graphical.