Patents by Inventor Kingo Suzuki
Kingo Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7663151Abstract: A light emitting device chip is obtained by dicing a light emitting device wafer having a light emitting layer section 24 based on a double heterostructure in which a first-conductivity-type cladding layer 6, an active layer 5 and an second-conductivity-type cladding layer 4, each of which being composed of a compound semiconductor having a composition allowing lattice matching with GaAs, out of compound semiconductors expressed by formula (AlxGa1-x)yIn1-yP (where, 0?x?1, 0?y?1), are stacked in this order, and having the (100) surface appeared on the main surface thereof, and GaP transparent semiconductor layers 20, 90 stacked on the light emitting layer section 24 as being agreed with the crystal orientation thereof, so that the {100} surfaces appear on the side faces of the GaP transparent semiconductor layer.Type: GrantFiled: April 13, 2005Date of Patent: February 16, 2010Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Hitoshi Ikeda, Kingo Suzuki, Akio Nakamura
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Patent number: 7579205Abstract: A light emitting device wafer having a light emitting layer section 24 having an AlGaInP-base double heterostructure, and a GaP light extraction layer 20 disposed on the light emitting layer section so as to allow a first main surface thereof to compose a first main surface of the wafer is fabricated so that the first main surface of the GaP light extraction layer appears as the (100) surface. The first main surface of the GaP light extraction layer 20 composed of the (100) surface is etched using an etching solution for surface roughening to thereby form surface roughening projections 40f. Accordingly, there can be provided a method of fabricating a light emitting device having the GaP light extraction layer agreed with the (100) main surface, capable of readily subjecting the (100) main surface to surface roughening.Type: GrantFiled: April 13, 2005Date of Patent: August 25, 2009Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Hitoshi Ikeda, Kingo Suzuki, Akio Nakamura
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Publication number: 20080061307Abstract: A light emitting device wafer having a light emitting layer section 24 having an AlGaInP-base double heterostructure, and a GaP light extraction layer 20 disposed on the light emitting layer section so as to allow a first main surface thereof to compose a first main surface of the wafer is fabricated so that the first main surface of the GaP light extraction layer appears as the (100) surface. The first main surface of the GaP light extraction layer 20 composed of the (100) surface is etched using an etching solution for surface roughening to thereby form surface roughening projections 40f. Accordingly, there can be provided a method of fabricating a light emitting device having the GaP light extraction layer agreed with the (100) main surface, capable of readily subjecting the (100) main surface to surface roughening.Type: ApplicationFiled: April 13, 2005Publication date: March 13, 2008Applicant: Shin-Etsu Handotai Co., Ltd.Inventors: Hitoshi Ikeda, Kingo Suzuki, Akio Nakamura
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Publication number: 20070224714Abstract: A light emitting device chip is obtained by dicing a light emitting device wafer having a light emitting layer section 24 based on a double heterostructure in which a first-conductivity-type cladding layer 6, an active layer 5 and an second-conductivity-type cladding layer 4, each of which being composed of a compound semiconductor having a composition allowing lattice matching with GaAs, out of compound semiconductors expressed by formula (AlxGa1-x)yIn1-yP (where, 0?x?1, 0?y?1), are stacked in this order, and having the (100) surface appeared on the main surface thereof, and GaP transparent semiconductor layers 20, 90 stacked on the light emitting layer section 24 as being agreed with the crystal orientation thereof, so that the {100} surfaces appear on the side faces of the GaP transparent semiconductor layer.Type: ApplicationFiled: April 13, 2005Publication date: September 27, 2007Applicant: Shin-Etsu Handotai Co., Ltd.Inventors: Hitoshi Ikeda, Kingo Suzuki, Akio Nakamura
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Patent number: 6995401Abstract: A light emitting device having an oxide transparent electrode layer as an emission drive electrode, and designed so that damage possibly occurs during bonding of electrode wires to the bonding pads is less influential to a light emitting layer portion is disclosed. The light emitting device has the light emitting layer portion composed of a compound semiconductor and has a double heterostructure in which a first-conductivity-type cladding layer, an active layer and a second-conductivity-type cladding layer are stacked in this order; and the light emitting layer portion is applied with emission drive voltage through an oxide transparent electrode layer formed so as to cover the main surface of the second-conductivity-type cladding layer. A bonding pad composed of a metal is disposed on the oxide transparent electrode layer, and to the bonding pad an electrode wire for current supply is bonded.Type: GrantFiled: October 22, 2003Date of Patent: February 7, 2006Assignees: Shin-Etsu Handotai Co., Ltd., Nanoteco CorporationInventors: Masato Yamada, Nobuhiko Noto, Masanobu Takahashi, Kingo Suzuki, Shinji Nozaki, Kazuo Uchida, Hiroshi Morisaki
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Publication number: 20040206961Abstract: A light emitting device having an oxide transparent electrode layer as an emission drive electrode, and designed so that damage possibly occurs during bonding of electrode wires to the bonding pads is less influential to a light emitting layer portion is disclosed. The light emitting device has the light emitting layer portion composed of a compound semiconductor and has a double heterostructure in which a first-conductivity-type cladding layer, an active layer and a second-conductivity-type cladding layer are stacked in this order; and the light emitting layer portion is applied with emission drive voltage through an oxide transparent electrode layer formed so as to cover the main surface of the second-conductivity-type cladding layer. A bonding pad composed of a metal is disposed on the oxide transparent electrode layer, and to the bonding pad an electrode wire for current supply is bonded.Type: ApplicationFiled: October 22, 2003Publication date: October 21, 2004Applicants: Shin-Etsu Handotai Co., Ltd., Nanoteco CorporationInventors: Masato Yamada, Nobuhiko Noto, Masanobu Takahashi, Kingo Suzuki, Shinji Nozaki, Kazuo Uchida, Hiroshi Morisaki
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Patent number: 6700139Abstract: The main surface on the side of a p-type layer of a GaP-base semiconductor is defined as a first main surface, and the main surface opposite thereto as a second main surface. The second main surface is lapped and then etched using aqua regia to thereby collectively form thereon specular concave curved surfaces which swell inwardly into the semiconductor substrate in order to enhance total reflection of light. On the other hand, the area on the surface of semiconductor substrate excluding that for forming a first contact layer and excluding the second main surface are subjected to anisotropic etching to thereby collectively form outwardly-swelling convex curved surfaces in order to reduce total reflection of light. A second contact layer (second electrode) to be formed on the second main surface is composed of an alloy of Au, Si and Ni, and a first contact layer to be formed on the first main surface is composed of an alloy of Au as combined with either of Be and Zn.Type: GrantFiled: August 27, 2002Date of Patent: March 2, 2004Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Kingo Suzuki, Hitoshi Ikeda, Yasutsugu Kaneko
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Publication number: 20030047745Abstract: The main surface on the side of a p-type layer of a GaP-base semiconductor is defined as a first main surface, and the main surface opposite thereto as a second main surface. The second main surface is lapped and then etched using aqua regia to thereby collectively form thereon specular concave curved surfaces which swell inwardly into the semiconductor substrate in order to enhance total reflection of light. On the other hand, the area on the surface of semiconductor substrate excluding that for forming a first contact layer and excluding the second main surface are subjected to anisotropic etching to thereby collectively form outwardly-swelling convex curved surfaces in order to reduce total reflection of light. A second contact layer (second electrode) to be formed on the second main surface is composed of an alloy of Au, Si and Ni, and a first contact layer to be formed on the first main surface is composed of an alloy of Au as combined with either of Be and Zn.Type: ApplicationFiled: August 27, 2002Publication date: March 13, 2003Applicant: Shin-Etsu Handotai Co., Ltd.Inventors: Kingo Suzuki, Hitoshi Ikeda, Yasutsugu Kaneko