Patents by Inventor Kingshuk Banerji

Kingshuk Banerji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5623127
    Abstract: A solder clad printed circuit board (100) consists of an electrically insulating substrate that has copper circuit traces (105), portions of which are solderable. A substantially planar layer (120) of a soldering composition is fused to the solderable traces, to form a solder pad that is not domed. The layer is composed of a mass of off-eutectic solder particles (115) that are fused together to form an agglomeration (120) having a porous structure. The solder particles are fused together by heating the off-eutectic solder to a temperature that is between the solidus temperature and the liquidus temperature of the solder. The solder is then cooled below the solidus temperature to solidify it.
    Type: Grant
    Filed: December 2, 1994
    Date of Patent: April 22, 1997
    Assignee: Motorola, Inc.
    Inventors: Edwin L. Bradley, III, Kingshuk Banerji, William B. Mullen, III
  • Patent number: 5573602
    Abstract: A solder paste is made from solder powder having two different alloys. The individual particles in the solder powder consist of a low melting solder coating (115) that surrounds a nucleus (120) of a higher melting solder. The low melting solder is compositionally distinct from the higher melting solder. The particles are suspended in a matrix of a solder paste vehicle, which may also contain a fluxing agent. In one embodiment of the invention, the low melting solder is an alloy of 43% tin, 43% lead and 14% bismuth, and the higher melting solder is an alloy of 52% tin, and 48% bismuth.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: November 12, 1996
    Assignee: Motorola, Inc.
    Inventors: Kingshuk Banerji, Edwin L. Bradley, III
  • Patent number: 5540379
    Abstract: A soldering process using two different types of solder alloys is disclosed. The first solder alloy (115) undergoes a solid-to-liquid transition at a first temperature. The second solder alloy (120) undergoes this solid-to-liquid transition at a second temperature, the second temperature being greater than the first temperature. The soldering composition is deposited (20) on a substrate (100) having solderable portions (105) and is heated to a temperature that is above the first temperature but below the second temperature (32). During this time, the first solder alloy liquifies, while the second solder alloy remains solid. The soldering composition is subsequently cooled (40) to solidify the first solder material. A part or electronic component is added (80) to the solidified solder material and the solder materials is again heated above the second temperature (30) in order to reflow the solder and form a metallurgical bond between the substrate and the electronic component.
    Type: Grant
    Filed: May 2, 1994
    Date of Patent: July 30, 1996
    Assignee: Motorola, Inc.
    Inventors: Vahid Kazem-Goudarzi, Henry F. Liebman, Kingshuk Banerji, William B. Mullen, III, Edwin L. Bradley, III
  • Patent number: 5535101
    Abstract: A semiconductor device package comprises an integrated circuit chip (10), a substrate (16), an encapsulant (30), and an organic coupling agent or underfill material (12) disposed between the integrated circuit chip and the first side of the substrate. The chip has a plurality of interconnection pads (14) disposed on an active surface of the chip at some minimum spacing "X." Each of the interconnect pads also has electrically conducting bumps (26) on them. The substrate has a circuit pattern (20) on a first side and an array of solder pads (23) spaced a certain distance apart on an opposite side of the substrate. The distance between these pads is greater than the minimum distance (X) between the interconnect pads on the IC. The circuit pattern is electrically connected to the array of solder pads by plated through holes (22). The length and width of the circuit carrying substrate is substantially greater than the length and width of the integrated circuit chip.
    Type: Grant
    Filed: November 3, 1992
    Date of Patent: July 9, 1996
    Assignee: Motorola, Inc.
    Inventors: Barry M. Miles, Frank J. Juskey, Kingshuk Banerji
  • Patent number: 5499756
    Abstract: A method of applying a tacking agent to a printed circuit board. The printed circuit board (10) has a number of solder pads (12), and each solder pad is preclad with a layer of solder (14) between 0.02 and 0.3 mm thick. A plastic film (16) is temporarily adhered to the printed circuit board by a pressure sensitive adhesive. The plastic film has a number of apertures (22) that correspond to the solder pads, and is positioned so that the apertures in the film expose the solder coated pads. There is a breakaway tab (20) on the plastic film that is used to peel the film from the printed circuit board in a later operation. The film is roller coated with a high viscosity tacking agent (30) so that a layer of the tacking agent is applied to the exposed interconnect pads. The plastic film is then peeled cleanly away from the printed circuit board using the breakaway tab, leaving the tacking agent only on the solder pads.
    Type: Grant
    Filed: February 3, 1995
    Date of Patent: March 19, 1996
    Assignee: Motorola, Inc.
    Inventors: Kingshuk Banerji, Edwin L. Bradley, III, Francisco Da Costa Alves
  • Patent number: 5446625
    Abstract: A chip carrier (20) includes a substrate (11) having a first copper pattern (12) deposited on a first surface (13), and a second copper pattern (14) deposited on a second surface (16). The second copper pattern (14) is plated with a metallic material to form wire bondable areas (18) on the second copper pattern (14), however, the first copper pattern (12) is substantially devoid of the metallic material. A device (21) is wire bonded to the wire bondable areas (18) of the second copper pattern (14), and a protective covering (23) covers the wire bondable areas (18).
    Type: Grant
    Filed: December 28, 1994
    Date of Patent: August 29, 1995
    Assignee: Motorola, Inc.
    Inventors: Glenn F. Urbish, William B. Mullen, III, Kingshuk Banerji
  • Patent number: 5429293
    Abstract: A soldering process uses two or more different solder alloys. A first solder alloy (115) that undergoes a solid-to-liquid transition at a first temperature is coated (20) onto the solderable surfaces (105) of a printed circuit board (100). A solder paste (120) that undergoes this solid-to-liquid transition at a temperature greater than the first temperature is deposited on the coated solderable potions, and is heated to a temperature that is above the first temperature but below the second temperature. During this time, the first solder alloy liquifies, while the solder paste does not. The first solder alloy wets to the individual particles in the solder paste, and alloys to the solderable surfaces and the solder particles in the solder paste. The soldering composition is subsequently cooled (40) to solidify the first solder material, forming a solid and substantially planar coating on the solderable potions of the printed circuit board.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: July 4, 1995
    Assignee: Motorola, Inc.
    Inventors: Edwin L. Bradley, III, Kingshuk Banerji, Vahid Kazem-Goudarzi
  • Patent number: 5427865
    Abstract: A solder preform (250) has solder particles of one alloy (210) arranged within a matrix of a second solder alloy (200). This arrangement forms a structure having the desired predetermined shape of the solder preform. The solder particles comprise one or more of the following elements: tin, lead, bismuth, indium, copper, antimony, cadmium, arsenic, aluminum, gallium, gold, silver. The particles have a predetermined melting temperature. The second solder alloy is compositionally distinct from the solder particles, and has a melting temperature that is lower than the melting temperature of the solder particles. The solder particles may comprise about 88% by weight of the solder preform, and the second solder alloy comprises about 12% by weight of the preform.
    Type: Grant
    Filed: May 2, 1994
    Date of Patent: June 27, 1995
    Assignee: Motorola, Inc.
    Inventors: William B. Mullen, III, Kingshuk Banerji, Edwin L. Bradley, III, Vahid Kazem-Goudarzi
  • Patent number: 5415944
    Abstract: A solder-clad printed circuit board (100) has solder particles of one alloy (120) arranged within a matrix of a second solder alloy (115). This arrangement forms a flat structure that is alloyed to the solder pads (105) on the substrate. The solder particles (120) have a predetermined melting temperature and are made from one or more of the following elements: tin, lead, bismuth, indium, copper, antimony, cadmium, arsenic, aluminum, gallium, gold, silver. The second solder alloy (115) is compositionally distinct from the solder particles, and has a melting temperature that is lower than the melting temperature of the solder particles. The solder particles may comprise about 88% by weight, and the second solder alloy may comprise about 12% by weight of the solder cladding.
    Type: Grant
    Filed: May 2, 1994
    Date of Patent: May 16, 1995
    Assignee: Motorola, Inc.
    Inventors: Vahid Kazem-Goudarzi, Edwin L. Bradley, III, Kingshuk Banerji, Henry F. Liebman
  • Patent number: 5311059
    Abstract: A semiconductor device package comprises a substrate (20) having a metallization pattern (22) on at least one surface, and a semiconductor device (10) having an active surface (12) and a grounded surface (14) on opposed sides. The semiconductor device is electrically attached to the substrate metallization pattern with the active surface (12) facing the substrate. A polymeric underfill material (30) substantially fills the space between the semiconductor device and the substrate. An electrically conductive material (35) covers the exposed grounded surface (14) of the semiconductor device and at least a portion of the metallization pattern (22), providing electrical connection between the grounded surface of the semiconductor and the metallization pattern (22) on the substrate.
    Type: Grant
    Filed: January 24, 1992
    Date of Patent: May 10, 1994
    Assignee: Motorola, Inc.
    Inventors: Kingshuk Banerji, Fadia Nounou, William B. Mullen, III
  • Patent number: 5293067
    Abstract: An integrated circuit chip carrier assembly, comprising a semiconductor device (10) having interconnection pads (14) disposed on an active surface (12) of the device. The device (10) is attached by means of electrically conducting bumps (26) to a circuitry pattern (18) on a first side of a circuit carrying substrate (16). The substrate is typically an aramid reinforced organic resin, such as epoxy. The circuitry (18, 20) is electrically connected by conductive through-holes (22) to an array of solder pads on a second side of the substrate. Some or all of the through-holes (22) are covered by the device. The overall length and width of the circuit carrying substrate (16) are each a maximum of about 0.15 inches greater than the equivalent dimensions of the device (10), creating a carrier that is only slightly larger than the semiconductor device itself.
    Type: Grant
    Filed: June 12, 1992
    Date of Patent: March 8, 1994
    Assignee: Motorola, Inc.
    Inventors: Kenneth R. Thompson, Kingshuk Banerji, William B. Mullen, III
  • Patent number: 5262674
    Abstract: Epoxy bonding between an IC chip and a chip carrier is strengthened by creating substantially rougher oxidized surfaces within substantially smooth gold surfaces of a die paddle portion of the chip carrier.
    Type: Grant
    Filed: April 9, 1992
    Date of Patent: November 16, 1993
    Assignee: Motorola, Inc.
    Inventors: Kingshuk Banerji, Kenneth R. Thompson, Francisco D. Alves
  • Patent number: 5203076
    Abstract: A method of attaching an integrated circuit (10) to a substrate (20) starts with electrically interconnecting (14) the integrated circuit on the substrate. Next, a bead of underfill material (22) is provided on the substrate (20) about the periphery (24) of the integrated circuit (10). At least a partial vacuum (34) is then applied to the integrated circuit (10) and the substrate (20) to substantially evacuate the area (18) between the integrated circuit (10) and the substrate (20). Finally, fluid pressure (42) is applied to the integrated circuit (10) and the substrate (20) to force at least a portion of the underfill material (22) into the area (18) between the integrated circuit (10) and the substrate (20).
    Type: Grant
    Filed: December 23, 1991
    Date of Patent: April 20, 1993
    Assignee: Motorola, Inc.
    Inventors: Kingshuk Banerji, Francisco D. Alves, Robert F. Darveaux
  • Patent number: 5166774
    Abstract: A selectively releasing runner and substrate assembly 100 comprises a plurality of conductive runners 116 adhered to a substrate 112, a portion 118 of at least some of the conductive runners 116 have non-planar areas with the substrate 112. Additionally the portion 118 has a lower adhesion to the substrate for selectively releasing the conductive runner 118 from the substrate 112 when subjected to a predetermined stress.
    Type: Grant
    Filed: October 5, 1990
    Date of Patent: November 24, 1992
    Assignee: Motorola, Inc.
    Inventors: Kingshuk Banerji, Anthony B. Suppelsa, William B. Mullen, III.
  • Patent number: 5152451
    Abstract: A method of soldering leadless components to a printed circuit board without using solder paste is disclosed. A thick layer of solder (42) is plated onto a printed circuit board (40), and an oxide layer (43) is formed by heating. Solder flux (45) is applied to those solder pads that are intended to be reflowed, and components (54) are placed. The printed circuit board is heated, and a solder joint (68) is effected between the components (54) and the circuit board (40), while the unfluxed solder pads (66) do not reflow and remain flat. Solder flux is then applied to the remaining solder pads (66) on the same or the opposite side of the circuit board. Additional components (77) are placed, and the circuit board (40) is reflowed a second time.
    Type: Grant
    Filed: April 1, 1991
    Date of Patent: October 6, 1992
    Assignee: Motorola, Inc.
    Inventors: Robert F. Darveaux, Kingshuk Banerji, Francisco da Costa Alves