Abstract: A programmable phase-locked loop frequency synthesizer having a feedback path that includes a tuned discriminator circuit is frequency modulated by coupling a portion of the modulating signal into the feedback path to effect modulation at rates which exceed the bandwidth of the phase-locked loop and by utilizing a portion of the modulating signal to frequency modulate the phase-locked loop reference signal to effect modulation at rates within the bandwidth of the phase-locked loop. A digitally controlled phase shifter that forms a portion of the discriminator tuning circuits in effect divides the phase-locked loop tuning range into a series of relatively narrow centiguous frequency bands. Data, representing deviations in the discriminator characteristics for each of these frequency bands, are stored in an erasable programmable read only memory.