Patents by Inventor Kingsuk Maitra

Kingsuk Maitra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240094683
    Abstract: The techniques disclosed herein mitigate stochasticity when controlling a mechanical system with artificial intelligence (AI) agents. In some configurations, AI agents are created using data generated by a machine learning model. Stochasticity is segmented temporally into near term and long term, and different strategies are used to address stochasticity in the different timeframes. For example, long term stochasticity may be addressed with changes to the reward function used to train the model. Short term stochasticity may be addressed by applying a margin to the output of an AI agent. Example margins include window averaging, clamps, and statistical process control bounds. In one configuration, AI agents are regression brains that are generated from setpoints inferred by the model from environmental states. The limitations inherent to fitting a regression line to this data may result in some predicted setpoints being outside of an allowed range.
    Type: Application
    Filed: September 19, 2022
    Publication date: March 21, 2024
    Inventors: Kingsuk MAITRA, Brendan Lee BRYANT, Chris Allen PREMOE, Kence ANDERSON
  • Publication number: 20240093900
    Abstract: The techniques disclosed herein enable utilizing a full range of setpoint values to control a mechanical system. A machine learning model is trained with states collected from the mechanical system. Some of the states may have little to no variation, limiting exploration of possible setpoint values when training the model. To enable a more thorough exploration of possible setpoint values, the states are augmented with a fluctuating delta value that is derived from a fixed setpoint value. For example, a delta outside air temperature may be computed by subtracting outside air temperature, which fluctuates, from a fixed chilled water setpoint. A method of moments computation converts delta values inferred by the model back into absolute values. The absolute values are used to compute a regression equation that is usable by the mechanical system to compute a setpoint action for a given set of input states.
    Type: Application
    Filed: September 19, 2022
    Publication date: March 21, 2024
    Inventors: Kingsuk MAITRA, Brendan Lee BRYANT, Kence ANDERSON
  • Publication number: 20230341822
    Abstract: The techniques disclosed herein enable systems to enhance the resilience of autonomous control systems through a fault-tolerant machine learning architecture. To achieve this, a fault-tolerant machine learning agent is constructed with a selector agent, a nominal agent, and a redundancy agent which is a multidimensional lookup table. The fault-tolerant machine learning agent extracts state data from an environment containing a control system and various components. The nominal agent and the redundancy agent generate actions for application to the control system based on the state data which are provided to the selector agent. Based on an analysis of the state data, the selector agent can detect a failure condition. In the event of a failure condition, the selector agent deploys the action generated by the redundancy agent lookup table to resolve the failure condition and restore normal operations.
    Type: Application
    Filed: June 21, 2022
    Publication date: October 26, 2023
    Inventors: Kingsuk MAITRA, Kinshumann KINSHUMANN, Garrett Patrick PRENDIVILLE, Kence ANDERSON
  • Publication number: 20230297096
    Abstract: The techniques disclosed herein enable systems to measure the long-term reliability of machine learning agents prior to deployment at a control system. This is achieved through analysis of control system component specifications to determine a useful lifespan of the components such as projected failure rate, hours continuous operation, and so forth. The system can derive parameters for the machine learning agent to interact with the components such as action frequency and action range. From the component lifespan, action frequency, and action range, an accelerated test procedure is constructed to evaluate the reliability of the machine learning agent. From executing the accelerated test procedure, a reliability score can be calculated for the machine learning agent.
    Type: Application
    Filed: June 10, 2022
    Publication date: September 21, 2023
    Inventors: Kingsuk MAITRA, Edilmo Daniel PALENCIA, Garrett Patrick PRENDIVILLE, Kence ANDERSON, Kinshumann KINSHUMANN
  • Publication number: 20230288882
    Abstract: The techniques disclosed herein enable systems to integrate aging awareness into machine learning agents for management of control systems. To achieve this, the machine learning agent extracts a set of states and an aging model from the control system and derives an aging term from the aging model. Based on the states and the aging term, the machine learning agent determines a set of actions that are applied to the control system. Subsequently, the machine learning agent can extract a new set of states to analyze the efficacy of the set of actions. This is achieved through an optimality function that quantifies the success of the set of actions by calculating an optimality score. The calculation is based on both a current performance of the system and a future drift or degradation of system components. Through many iterations of the action set, the machine learning agent can optimize system operations.
    Type: Application
    Filed: March 14, 2022
    Publication date: September 14, 2023
    Inventors: Kingsuk MAITRA, Kence ANDERSON
  • Publication number: 20230266720
    Abstract: The techniques disclosed herein enable systems to enhance autonomous process control platforms using a quality aware machine learning agent. To achieve this, a machine learning agent is integrated into a process control system. The machine learning agent extracts a set of states from an environment containing the process and defines a set of corresponding quality states which are then extracted from the environment as well. Based on the set of states and quality states, the machine learning agent determines a set of actions that modify operating parameters of the process. Applying the actions results in an updated set of states and quality states which can be analyzed to compute an optimality score, quantifying the effectiveness of the actions. Based on the updated states and quality states, the machine learning agent determines a modified set of actions to apply to the environment and increase the optimality score.
    Type: Application
    Filed: June 14, 2022
    Publication date: August 24, 2023
    Inventors: Kingsuk MAITRA, Garrett Patrick PRENDIVILLE, Hossein KHADIVI HERIS, Jillian Marie CLEMENTS, Kence ANDERSON
  • Patent number: 11656454
    Abstract: The description relates to computing devices that employ steerable optics. One example includes a steering mechanism and a base substrate positioned relative to the steering mechanism. The example also includes an optical substrate positioned over the base substrate and an adhesive complex securing the optical substrate relative to the base substrate with multiple different types of adhesives.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: May 23, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Chuan Pu, Jincheng Wang, Kingsuk Maitra, Michael James Nystrom
  • Publication number: 20220113049
    Abstract: Systems and methods related to autonomous control of supervisory setpoints using artificial intelligence are described. In one example, a method including using a measurable attribute associated with a system, segmenting operational data associated with the system into at least a first bin and a second bin, is provided. The method further includes training a first brain based on a first data model associated with the first bin and training a second brain based on a second data model associated with the second bin. The method further includes using the first brain and the second brain, implemented by at least one processor, automatically generating predicted supervisory control suggestions for a plurality of supervisory setpoints associated with the system.
    Type: Application
    Filed: December 23, 2020
    Publication date: April 14, 2022
    Inventors: Kingsuk MAITRA, Hossein KHADIVI HERIS
  • Publication number: 20210132363
    Abstract: The description relates to computing devices that employ steerable optics. One example includes a steering mechanism and a base substrate positioned relative to the steering mechanism. The example also includes an optical substrate positioned over the base substrate and an adhesive complex securing the optical substrate relative to the base substrate with multiple different types of adhesives.
    Type: Application
    Filed: December 10, 2020
    Publication date: May 6, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Chuan PU, Jincheng WANG, Kingsuk MAITRA, Michael James NYSTROM
  • Patent number: 10890755
    Abstract: The description relates to computing devices that employ steerable optics. One example includes a steering mechanism and a base substrate positioned relative to the steering mechanism. The example also includes an optical substrate positioned over the base substrate and an adhesive complex securing the optical substrate relative to the base substrate with multiple different types of adhesives.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: January 12, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Chuan Pu, Jincheng Wang, Kingsuk Maitra, Michael James Nystrom
  • Publication number: 20190369386
    Abstract: The description relates to computing devices that employ steerable optics. One example includes a steering mechanism and a base substrate positioned relative to the steering mechanism. The example also includes an optical substrate positioned over the base substrate and an adhesive complex securing the optical substrate relative to the base substrate with multiple different types of adhesives.
    Type: Application
    Filed: May 30, 2018
    Publication date: December 5, 2019
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Chuan PU, Jincheng WANG, Kingsuk MAITRA, Michael James NYSTROM
  • Patent number: 9495491
    Abstract: Embodiments are disclosed that relate to implementing semiconductor device cooling systems that leverage awareness of regional voltage and temperature reliability risk considerations. For example, one disclosed embodiment provides a method of implementing a cooling system configured to cool an integrated circuit. The method involves first determining a heat dissipation factor that would reduce each region of the integrated circuit to a reduced temperature in order to maintain an overall failure rate. An analysis is then performed, using an insight about the relative reliability risk of elevated voltage and temperatures, to identify a region of the integrated circuit whose temperature can be permitted to rise without exceeding the overall failure rate, thereby permitting implementation of a cooling system with a reduced heat dissipation factor.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: November 15, 2016
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Kingsuk Maitra, Tung Thanh Nguyen, Brian Keith Langendorf, Julia Purtell, Rune Hartung Jensen, Ranjit Gannamani, Amit Prabhakar Marathe
  • Patent number: 9219040
    Abstract: Methods of fabricating an integrated circuit with a fin-based fuse, and the resulting integrated circuit with a fin-based fuse are provided. In the method, a fin is created from a layer of semiconductor material and has a first end and a second end. The method provides for forming a conductive path on the fin from its first end to its second end. The conductive path is electrically connected to a programming device that is capable of selectively directing a programming current through the conductive path to cause a structural change in the conductive path to increase resistance across the conductive path.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: December 22, 2015
    Assignee: GLOBALFOUNDRIES, INC.
    Inventors: Randy W. Mann, Kingsuk Maitra, Anurag Mittal
  • Publication number: 20150261901
    Abstract: Embodiments are disclosed that relate to implementing semiconductor device cooling systems that leverage awareness of regional voltage and temperature reliability risk considerations. For example, one disclosed embodiment provides a method of implementing a cooling system configured to cool an integrated circuit. The method involves first determining a heat dissipation factor that would reduce each region of the integrated circuit to a reduced temperature in order to maintain an overall failure rate. An analysis is then performed, using an insight about the relative reliability risk of elevated voltage and temperatures, to identify a region of the integrated circuit whose temperature can be permitted to rise without exceeding the overall failure rate, thereby permitting implementation of a cooling system with a reduced heat dissipation factor.
    Type: Application
    Filed: June 27, 2014
    Publication date: September 17, 2015
    Inventors: Kingsuk Maitra, Tung Thanh Nguyen, Brian Keith Langendorf, Julia Purtell, Rune Hartung Jensen, Ranjit Gannamani, Amit Prabhakar Marathe
  • Patent number: 8963255
    Abstract: A semiconductor is formed on a (110) silicon (Si) substrate, with improved electron mobility. Embodiments include semiconductor devices having a silicon carbide (SiC) portion in the nFET channel region. An embodiment includes forming an nFET channel region and a pFET channel region in a Si substrate, such as a (110) Si substrate, and forming a silicon carbide (SiC) portion on the nFET channel region. The SiC portion may be formed by ion implantation of C followed by a recrystallization anneal or by epitaxial growth of SiC in a recess formed in the substrate. The use of SiC in the nFET channel region improves electron mobility without introducing topographical differences between NMOS and PMOS transistors.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: February 24, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Jeremy A. Wahl, Kingsuk Maitra
  • Patent number: 8900973
    Abstract: A method of making a semiconductor device patterns a first fin in a pFET region, and patterns a second fin in an nFET region. A plurality of conformal microlayers containing a straining material are deposited on the first and second fins. A protective cap material is formed on the first fin, and the conformal layers are selectively removed from the second fin. The straining material is then thermally diffused into the first fin. The protective cap material is removed from the first fin after the thermal annealing and after the conformal micro layers are selectively removed from the second fin.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: December 2, 2014
    Assignees: International Business Machines Corporation, Globalfoundries Inc., Renesas Electronics America Inc., STMicroelectronics, Inc.
    Inventors: Nathaniel C. Berliner, Pranita Kulkarni, Nicolas Loubet, Kingsuk Maitra, Sanjay C. Mehta, Paul A. Ronsheim, Toyoji Yamamoto, Zhengmao Zhu
  • Publication number: 20140203298
    Abstract: A semiconductor is formed on a (110) silicon (Si) substrate, with improved electron mobility. Embodiments include semiconductor devices having a silicon carbide (SiC) portion in the nFET channel region. An embodiment includes forming an nFET channel region and a pFET channel region in a Si substrate, such as a (110) Si substrate, and forming a silicon carbide (SiC) portion on the nFET channel region. The SiC portion may be formed by ion implantation of C followed by a recrystallization anneal or by epitaxial growth of SiC in a recess formed in the substrate. The use of SiC in the nFET channel region improves electron mobility without introducing topographical differences between NMOS and PMOS transistors.
    Type: Application
    Filed: March 19, 2014
    Publication date: July 24, 2014
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Jeremy A. WAHL, Kingsuk MAITRA
  • Patent number: 8759904
    Abstract: Electronic devices (20, 20?) of superior design flexibility that avoid channel-width quantization effects common with prior art fin-type (FIN) field effect transistors (FIN-FETS) (22) are obtained by providing multiple FIN-FETs (22) and at least one planar FET (32, 32?) on a common substrate (21), wherein the multiple FIN-FETs (22) have fins (231, 232) of at least fin heights H1 and H2, with H2<H1. The multiple FIN-FETs (22) and the at least one planar FET (32, 32?) are separated vertically as well as laterally, which aids electrical isolation therebetween. Such electrical isolation can be enhanced by forming the planar FET (32) in a semiconductor region (441) insulated from the common substrate (21).
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: June 24, 2014
    Assignee: GlobalFoundries, Inc.
    Inventors: Jeremy A. Wahl, Kingsuk Maitra
  • Patent number: 8722482
    Abstract: A semiconductor is formed on a (110) silicon (Si) substrate, with improved electron mobility. Embodiments include semiconductor devices having a silicon carbide (SiC) portion in the nFET channel region. An embodiment includes forming an nFET channel region and a pFET channel region in a Si substrate, such as a (110) Si substrate, and forming a silicon carbide (SiC) portion on the nFET channel region. The SiC portion may be formed by ion implantation of C followed by a recrystallization anneal or by epitaxial growth of SiC in a recess formed in the substrate. The use of SiC in the nFET channel region improves electron mobility without introducing topographical differences between NMOS and PMOS transistors.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: May 13, 2014
    Assignee: GlobalFoundries Inc.
    Inventors: Jeremy A. Wahl, Kingsuk Maitra
  • Patent number: 8669147
    Abstract: Disclosed herein are various methods of forming high mobility fin channels on three dimensional semiconductor devices, such as, for example, FinFET semiconductor devices. In one example, the method includes forming a plurality of spaced-apart trenches in a semiconducting substrate, wherein the trenches define an original fin structure for the device, and wherein a portion of a mask layer is positioned above the original fin structure, forming a compressively-stressed material in the trenches and adjacent the portion of mask layer, after forming the compressively-stressed material, removing the portion of the mask layer to thereby expose an upper surface of the original fin structure, and forming a final fin structure above the exposed surface of the original fin structure.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: March 11, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Daniel T. Pham, Robert J. Miller, Kingsuk Maitra