Patents by Inventor Kinuko Mishiro

Kinuko Mishiro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10299387
    Abstract: A substrate on which an electronic component is soldered, includes an electronic component, a through hole positioned on the substrate and passing through the substrate, a solder that joins the through hole and a terminal of the electronic component inserted in the through hole, a pattern formed on a first surface of the substrate, the first surface facing a second surface on which the electronic component is placed, a first resist superimposed on the pattern, an exposed portion of which the pattern is exposed from the first resist around the through hole, and a second resist superimposed on the pattern and arranged between the through hole and the exposed portion.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: May 21, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Yoshikazu Hirano, Kinuko Mishiro, Toru Okada
  • Publication number: 20180343748
    Abstract: A substrate on which an electronic component is soldered, includes an electronic component, a through hole positioned on the substrate and passing through the substrate, a solder that joins the through hole and a terminal of the electronic component inserted in the through hole, a pattern formed on a first surface of the substrate, the first surface facing a second surface on which the electronic component is placed, a first resist superimposed on the pattern, an exposed portion of which the pattern is exposed from the first resist around the through hole, and a second resist superimposed on the pattern and arranged between the through hole and the exposed portion.
    Type: Application
    Filed: May 21, 2018
    Publication date: November 29, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Yoshikazu Hirano, KINUKO MISHIRO, Toru Okada
  • Publication number: 20160254241
    Abstract: A printed circuit board includes: a substrate; a first electrode formed on the substrate; a protrusion member formed on the first electrode and extending from a central portion of the first electrode towards an outer peripheral portion of the first electrode; and a solder covering the first electrode and the protrusion member and connecting the first electrode to a second electrode of a component mounted on the substrate.
    Type: Application
    Filed: January 27, 2016
    Publication date: September 1, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Yoshinobu MAENO, Kinuko MISHIRO
  • Publication number: 20110188214
    Abstract: A method for connection of a flexible circuit board to a rigid circuit board is provided. The method includes supplying an adhesive agent onto a first electrode pattern provided on one surface of the rigid circuit board. The rigid circuit board has a plurality of electronic components mounted on the other surface with a gap therebetween. The method also includes aligning a second electrode pattern provided on the flexible circuit board to the first electrode pattern of the rigid circuit board. The adhesive agent is heated under pressure to electrically connect the second electrode pattern to the first electrode pattern by pressing the gap between the plurality of electronic components with a jig which has a press-contact section of a narrower width than the gap.
    Type: Application
    Filed: January 25, 2011
    Publication date: August 4, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Kinuko MISHIRO
  • Patent number: 7835159
    Abstract: A second member is superposed on a first member. A first recognition mark is described on the surface of the first member. A second recognition mark is described on the surface of the second members. The first recognition mark is fragmented along the edge of the second member when the second member is superposed on the first member. The second recognition mark ends at the edge of the second member. The second recognition mark cooperates with the first recognition mark for establishment of a predetermined geometric pattern. The relative positions of the first and second recognition marks can be adjusted based on an irregular or unshaped geometric pattern. The second member can thus reliably be superposed on the surface of the first member at the correct position.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: November 16, 2010
    Assignee: Fujitsu Limited
    Inventors: Kinuko Mishiro, Yutaka Higashiguchi, Masahiko Yamashita
  • Publication number: 20080101048
    Abstract: A second member is superposed on a first member. A first recognition mark is described on the surface of the first member. A second recognition mark is described on the surface of the second members. The first recognition mark is fragmented along the edge of the second member when the second member is superposed on the first member. The second recognition mark ends at the edge of the second member. The second recognition mark cooperates with the first recognition mark for establishment of a predetermined geometric pattern. The relative positions of the first and second recognition marks can be adjusted based on an irregular or unshaped geometric pattern. The second member can thus reliably be superposed on the surface of the first member at the correct position.
    Type: Application
    Filed: August 28, 2007
    Publication date: May 1, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Kinuko Mishiro, Yutaka Higashiguchi, Masahiko Yamashita
  • Patent number: 7321099
    Abstract: To provide a component mounting substrate and a component mounting structure which absorb stresses caused by impact or by the difference in the thermal extension coefficient between substrate and component, without increasing the required accuracy in soldering the substrate and the component together. The substrate, which is to be mounted with a component having one or more solder joints via which the component is connected to the substrate, has a depressed part thereof formed on its component side, on which one or more electrodes are provided to be closely joined with the solder joints. The depressed part is filled with a filling material with rigidity different from that of a material making up the substrate body, such that the filling material is flush or almost flush with the surface of the component side of the substrate.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: January 22, 2008
    Assignee: Fujitsu Limited
    Inventor: Kinuko Mishiro
  • Publication number: 20070063324
    Abstract: A warp reducing member is bonded to an area on one surface of the substrate corresponding to other side of an electronic part for which the warp is to be reduced with respect to a substrate. An external size of the warp reducing member is substantially same as a size of each of a plurality of electronic parts or large enough to include multiple electronic parts. The warp reducing member is bonded to the substrate with a bonding material having a melting point lower than that of other bonding material that electrically connects the electronic parts to the substrate.
    Type: Application
    Filed: December 29, 2005
    Publication date: March 22, 2007
    Inventors: Kinuko Mishiro, Ken-ichiro Tsubone
  • Publication number: 20050224252
    Abstract: To provide a component mounting substrate and a component mounting structure which absorb stresses caused by impact or by the difference in the thermal extension coefficient between substrate and component, without increasing the required accuracy in soldering the substrate and the component together. The substrate, which is to be mounted with a component having one or more solder joints via which the component is connected to the substrate, has a depressed part thereof formed on its component side, on which one or more electrodes are provided to be closely joined with the solder joints. The depressed part is filled with a filling material with rigidity different from that of a material making up the substrate body, such that the filling material is flush or almost flush with the surface of the component side of the substrate.
    Type: Application
    Filed: August 19, 2004
    Publication date: October 13, 2005
    Applicant: FUJITSU LIMITED
    Inventor: Kinuko Mishiro
  • Patent number: 5799392
    Abstract: A method of manufacturing a connecting structure of first and second printed wiring boards each having an electrode for conductively connecting to each other using a conductive film. A first printed wiring board with a resist film bonds to a second printed wiring board directly or using conductive film or bonding film. Both electrodes can be bonded using a conductive film and/or a bonding film. The resist film on one printed wiring board can be bonded to the electrode of another printed wiring board using a conductive film, or both resist films can be bonded using a conductive film.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: September 1, 1998
    Assignee: Fujitsu Limited
    Inventor: Kinuko Mishiro