Patents by Inventor Kinya Osa

Kinya Osa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6938105
    Abstract: A data processing apparatus improves speed and efficiency of transfer of bit data, especially, multivalue data bit plane. For this purpose, a memory 50 holds four 8-bit multivalue data per 1 word, and bit plane coding processing is made by 4×4 (=16) multivalue data (processing block). In a memory area 51, the most significant bit (bit 7) of respective multivalue data (data 0 to 15 in FIG. 5) is collected in the order of multivalue data, and stored in one position (hatched portions in FIG. 5). Similarly, bit 6 is collected from the respective multivalue data and stored in one position.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: August 30, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kinya Osa
  • Publication number: 20040178932
    Abstract: A data compression method for executing encode commands for PackBits compression by a processor. The encode commands include a first command to obtain an encode processing state of the PackBits compression and control output of a control code (+1, −2 etc.) based on the encode processing state, a second command to control output of input data (A to F) based on the encode processing state, and a third command to control output of a control command upon completion of the PackBits compression. In this arrangement, the PackBits encode processing can be performed at a high speed by the processor.
    Type: Application
    Filed: March 8, 2004
    Publication date: September 16, 2004
    Inventor: Kinya Osa
  • Patent number: 6717613
    Abstract: When pixel signals included in pixel blocks forming an image are supplied, a detector detects the difference between pixel signal levels in the vicinity of block boundary of the pixel blocks. Then, a comparator compares the difference with a threshold value. An adder adds additional values to the pixel signal levels in the vicinity of block boundary in accordance with the comparison results. A pseudo random number is generated, to select a value pattern including the additional values from additional value patterns based on the random number. The above-described process can disturb the regularity of differentials in the pixel block boundary, thus positively facilitating to eliminate block deformation possibly arising in between pixel blocks.
    Type: Grant
    Filed: July 29, 1997
    Date of Patent: April 6, 2004
    Assignee: United Module Corporation
    Inventor: Kinya Osa
  • Patent number: 6496605
    Abstract: A filter for removing block deformation that occurs in an image signal is disclosed. Detected are a plurality of differentials each between at least two pixel signal levels on block boundaries between pixel blocks and in the vicinity of the block boundaries in response to pixel signals included in a plurality of pixel blocks that form an image. The differentials are compared with each other to obtain the maximum differential absolute value. The maximum differential absolute value is compared with a reference value to determine whether block deformation occurs in a pixel signal in the vicinity of a position on the pixel blocks where the maximum differential absolute value is obtained. The block deformation is removed when it is determined that the block deformation occurs in the pixel signal in the vicinity of the position on the pixel blocks where the maximum differential absolute value is obtained.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: December 17, 2002
    Assignee: United Module Corporation
    Inventor: Kinya Osa
  • Publication number: 20020057276
    Abstract: A data processing apparatus improves speed and efficiency of transfer of bit data, especially, multivalue data bit plane. For this purpose, a memory 50 holds four 8-bit multivalue data per 1 word, and bit plane coding processing is made by 4×4 (=16) multivalue data (processing block). In a memory area 51, the most significant bit (bit 7) of respective multivalue data (data 0 to 15 in FIG. 5) is collected in the order of multivalue data, and stored in one position (hatched portions in FIG. 5). Similarly, bit 6 is collected from the respective multivalue data and stored in one position.
    Type: Application
    Filed: October 23, 2001
    Publication date: May 16, 2002
    Inventor: Kinya Osa
  • Publication number: 20020027558
    Abstract: In bit plane coding, bit plane(s) to be encoded are selected, and coding is performed only on the selected bit plane(s). At step S701, a maximum value of data is obtained. At step S702, respective bits constructing the maximum value data are examined from a higher-order bit (MSB). At step S703, if the bit is 1, at step S704 the order of the bit from the highest order is specified, thus a highest-order significant bit plane is specified, and the process ends. On the other hand, if it is determined at step S703 that the bit is 0, the next bit constructing the maximum value is examined.
    Type: Application
    Filed: June 8, 2001
    Publication date: March 7, 2002
    Inventor: Kinya Osa
  • Patent number: 5751888
    Abstract: A moving picture signal decoder for decoding compressed picture data resulting from compressing original picture data by use of a combination of picture information including picture data of each frame of a moving picture signal and motion vector information including a motion vector between frames, the moving picture signal decoder comprising demultiplexer device for demultiplexing the compressed picture data to obtain the picture data and the motion vector; decoding device for decoding the picture data to obtain decoded picture data; down-sampling device for (i) down-sampling the decoded picture data so that the decoded picture data has 1/M a number of pixels included in the original picture data, where M is a positive integer, in one of a reverse playback mode and a fast forward/reverse playback mode and (ii) passing the decoded picture data as it is in a normal playback mode; scaling device for (i) multiplying the motion vector by 1/m in one of the reverse playback mode and the fast forward/reverse playba
    Type: Grant
    Filed: June 6, 1996
    Date of Patent: May 12, 1998
    Assignee: Nippon Steel Corporation
    Inventors: Hiroyuki Fukuchi, Kinya Osa