Patents by Inventor Kiran Ganesh

Kiran Ganesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240069947
    Abstract: A computer-implemented method according to one embodiment includes assigning a priority to virtual machines (VMs), and obtaining pathing information for the VMs. At least one of the VMs assigned a relatively higher priority is selected to perform a process over at least one of the VMs assigned a relatively lower priority. A computer program product according to another embodiment includes a computer readable storage medium having program instructions embodied therewith. The program instructions are readable and/or executable by a computer to cause the computer to perform the foregoing method. A system according to another embodiment includes a processor, and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. The logic is configured to perform the foregoing method.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: Esdras E. Cruz-Aguilar, Jes Kiran Chittigala, Santhosh S. Joshi, Ravi A. Shankar, Perinkulam I. Ganesh, Michael S. Fuller
  • Publication number: 20240069778
    Abstract: A method, computer system, and computer program product area provided. A computer transmits a query command to a storage descriptor area of a first disk. The first disk belongs to a dual-site data replication system. The dual-site data replication system provides active-active access to a volume of data stored in an active disk and replicated in a backup disk. The computer receives a response to the query command. The response indicates the active disk and the backup disk for the dual-site data replication system. The computer controls an additional copy of the volume of data at a further remote site based on the active disk.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: Esdras E. Cruz-Aguilar, Taru Varshney, Jes Kiran Chittigala, Ravi A. Shankar, Perinkulam I. Ganesh, Michael S Fuller
  • Patent number: 6823500
    Abstract: A 2-dimensional placement system and method minimize reliability concerns arising from electromigration and self-heat while at the same time achieving a high layout density. The 2-dimensional placement method also uses a placement space with rows that have non-uniform sizes and are overlapping. According to one embodiment of the present invention, a computerized method of creating a layout for a circuit design includes receiving a circuit design and receiving at least one layout rule based on a reliability verification constraint for the circuit design. The computerized method further includes generating a layout for the circuit design through computer automated operations wherein the layout generated satisfies the at least one layout rule based on the reliability verification constraint received for the circuit design.
    Type: Grant
    Filed: November 1, 1999
    Date of Patent: November 23, 2004
    Assignee: Intel Corporation
    Inventors: Kiran Ganesh, Artour Levin, Miles F. McCoo, Naresh K. Sehgal