Patents by Inventor Kiran K. Gunnam
Kiran K. Gunnam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240036207Abstract: Methods and systems for improved simultaneous localization and mapping based on 3-D LIDAR image data are presented herein. In one aspect, LIDAR image frames are segmented and clustered before feature detection to improve computational efficiency while maintaining both mapping and localization accuracy. Segmentation involves removing redundant data before feature extraction. Clustering involves grouping pixels associated with similar objects together before feature extraction. In another aspect, features are extracted from LIDAR image frames based on a measured optical property associated with each measured point. The pools of feature points comprise a low resolution feature map associated with each image frame. Low resolution feature maps are aggregated over time to generate high resolution feature maps.Type: ApplicationFiled: October 11, 2023Publication date: February 1, 2024Applicant: Velodyne Lidar USA, Inc.Inventor: Kiran K. Gunnam
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Patent number: 11821987Abstract: Methods and systems for improved simultaneous localization and mapping based on 3-D LIDAR image data are presented herein. In one aspect, LIDAR image frames are segmented and clustered before feature detection to improve computational efficiency while maintaining both mapping and localization accuracy. Segmentation involves removing redundant data before feature extraction. Clustering involves grouping pixels associated with similar objects together before feature extraction. In another aspect, features are extracted from LIDAR image frames based on a measured optical property associated with each measured point. The pools of feature points comprise a low resolution feature map associated with each image frame. Low resolution feature maps are aggregated over time to generate high resolution feature maps.Type: GrantFiled: September 13, 2018Date of Patent: November 21, 2023Assignee: Velodyne Lidar USA, Inc.Inventor: Kiran K. Gunnam
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Publication number: 20230042797Abstract: Methods and systems for controlling illumination power of a LIDAR based, three dimensional imaging system based on discrete illumination power tiers are described herein. In one aspect, the illumination intensity of a pulsed beam of illumination light emitted from a LIDAR system is varied in accordance with a set of illumination power tiers based on the difference between a desired and a measured return pulse. In a further aspect, the illumination power tier is selected based on whether an intensity difference exceeds one of a sequence of predetermined, tiered threshold values. In this manner, the intensity of measured return pulses is maintained within a linear range of the analog to digital converter for objects detected over a wide range of distances from the LIDAR system and a wide range of environmental conditions in the optical path between the LIDAR system and the detected object.Type: ApplicationFiled: August 15, 2022Publication date: February 9, 2023Inventor: Kiran K. Gunnam
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Patent number: 11415681Abstract: Methods and systems for controlling illumination power of a LIDAR based, three dimensional imaging system based on discrete illumination power tiers are described herein. In one aspect, the illumination intensity of a pulsed beam of illumination light emitted from a LIDAR system is varied in accordance with a set of illumination power tiers based on the difference between a desired and a measured return pulse. In a further aspect, the illumination power tier is selected based on whether an intensity difference exceeds one of a sequence of predetermined, tiered threshold values. In this manner, the intensity of measured return pulses is maintained within a linear range of the analog to digital converter for objects detected over a wide range of distances from the LIDAR system and a wide range of environmental conditions in the optical path between the LIDAR system and the detected object.Type: GrantFiled: January 10, 2019Date of Patent: August 16, 2022Assignee: VELODYNE LIDAR USA, INC.Inventor: Kiran K. Gunnam
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Publication number: 20200025896Abstract: Methods and systems for controlling illumination power of a LIDAR based, three dimensional imaging system based on discrete illumination power tiers are described herein. In one aspect, the illumination intensity of a pulsed beam of illumination light emitted from a LIDAR system is varied in accordance with a set of illumination power tiers based on the difference between a desired and a measured return pulse. In a further aspect, the illumination power tier is selected based on whether an intensity difference exceeds one of a sequence of predetermined, tiered threshold values. In this manner, the intensity of measured return pulses is maintained within a linear range of the analog to digital converter for objects detected over a wide range of distances from the LIDAR system and a wide range of environmental conditions in the optical path between the LIDAR system and the detected object.Type: ApplicationFiled: January 10, 2019Publication date: January 23, 2020Inventor: Kiran K. Gunnam
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Publication number: 20190079193Abstract: Methods and systems for improved simultaneous localization and mapping based on 3-D LIDAR image data are presented herein. In one aspect, LIDAR image frames are segmented and clustered before feature detection to improve computational efficiency while maintaining both mapping and localization accuracy. Segmentation involves removing redundant data before feature extraction. Clustering involves grouping pixels associated with similar objects together before feature extraction. In another aspect, features are extracted from LIDAR image frames based on a measured optical property associated with each measured point. The pools of feature points comprise a low resolution feature map associated with each image frame. Low resolution feature maps are aggregated over time to generate high resolution feature maps.Type: ApplicationFiled: September 13, 2018Publication date: March 14, 2019Inventor: Kiran K. Gunnam
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Patent number: 9659637Abstract: A storage device may include a processor and a memory device including a multilevel memory cell. The processor may correlate a first physical page address and a second physical page address, each address being associated with the multilevel memory cell. The processor also may apply a first read operation to the memory cell to determine a value of a first bit associated with the first physical page address. The processor additionally may apply at least a second read operation to the multilevel memory cell to determine a value of a second bit associated with the second physical page address. The processor may determine, based at least in part on the value of the first bit and the value of the second bit, a soft decision value associated with the second bit. The processor may verify the value of the second bit based at least in part on the soft decision value.Type: GrantFiled: August 11, 2015Date of Patent: May 23, 2017Assignee: Western Digital Technologies, Inc.Inventors: Seung-Hwan Song, Kiran K. Gunnam, Zvonimir Z. Bandic
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Publication number: 20170047114Abstract: A storage device may include a processor and a memory device including a multilevel memory cell. The processor may correlate a first physical page address and a second physical page address, each address being associated with the multilevel memory cell. The processor also may apply a first read operation to the memory cell to determine a value of a first bit associated with the first physical page address. The processor additionally may apply at least a second read operation to the multilevel memory cell to determine a value of a second bit associated with the second physical page address. The processor may determine, based at least in part on the value of the first bit and the value of the second bit, a soft decision value associated with the second bit. The processor may verify the value of the second bit based at least in part on the soft decision value.Type: ApplicationFiled: August 11, 2015Publication date: February 16, 2017Inventors: Seung-Hwan Song, Kiran K. Gunnam, Zvonimir Z. Bandic
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Patent number: 8418023Abstract: A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes a control unit that controls decoder processing, the control unit causing the decoder to process the blocks of a low density parity check (“LDPC”) matrix out of order. A decoder embodiment may process the layers of the LDPC matrix out of order and/or perform partial state processing on out of order blocks of the LDPC matrix and/or generate R messages out of order.Type: GrantFiled: May 1, 2008Date of Patent: April 9, 2013Assignee: The Texas A&M University SystemInventors: Kiran K. Gunnam, Gwan S. Choi
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Patent number: 8359522Abstract: A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R message by selecting from a plurality of possible R message values. The Q message memory stores a Q message until an R message is generated by a CNU, the Q message and the R message are combined to provide a P message. The cyclic shifter shifts the P message.Type: GrantFiled: May 1, 2008Date of Patent: January 22, 2013Assignee: Texas A&M University SystemInventors: Kiran K. Gunnam, Gwan S. Choi
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Publication number: 20080301521Abstract: A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes a control unit that controls decoder processing, the control unit causing the decoder to process the blocks of a low density parity check (“LDPC”) matrix out of order. A decoder embodiment may process the layers of the LDPC matrix out of order and/or perform partial state processing on out of order blocks of the LDPC matrix and/or generate R messages out of order.Type: ApplicationFiled: May 1, 2008Publication date: December 4, 2008Applicant: TEXAS A&M UNIVERSITY SYSTEMInventors: Kiran K. GUNNAM, Gwan S. CHOI
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Publication number: 20080276156Abstract: A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R message by selecting from a plurality of possible R message values. The Q message memory stores a Q message until an R message is generated by a CNU, the Q message and the R message are combined to provide a P message. The cyclic shifter shifts the P message.Type: ApplicationFiled: May 1, 2008Publication date: November 6, 2008Applicant: TEXAS A&M UNIVERSITY SYSTEMInventors: Kiran K. GUNNAM, Gwan S. CHOI