Patents by Inventor Kiran K. Kintali
Kiran K. Kintali has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11354463Abstract: A solver may generate a system of equations for an acausal model. A partitioning engine may transform at least some of the equations into groups of equations whose inputs/outputs are connected directly. The partitioning engine may transform at least some of the equations into groups of linear equations and/or groups of switched linear equations that are connected through nonlinear functions. The solver may determine input-output relationships of the groups of equations. A simulation model generator that may include a library of types of model elements may construct a causal simulation model.Type: GrantFiled: September 24, 2019Date of Patent: June 7, 2022Assignee: The MathWorks, Inc.Inventors: Mohamed Babaali, Wurigen Bo, Kiran K. Kintali, Shomit Dutta, Ebrahim M. Mestchian, Naman Saraf
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Patent number: 10936769Abstract: Systems and methods evaluate simulation models and measure floating point arithmetic errors in terms of Unit in Last Place (ULP). The simulation model may include model elements that perform numerical computations using Native Floating Point (NFP) arithmetic. The model elements may be arranged to implement a procedure. A data store may include local ULP errors predetermined for the model elements. The systems and methods may retrieve the local ULP errors for the model elements included in the model, and may apply a rules-based analysis to compute an overall ULP error of the simulation model. The systems and methods may present the overall ULP computed for the model. The systems and methods may also present intermediate ULP errors determined for portions of the simulation model. Changes may be made to the model to reduce the overall ULP error.Type: GrantFiled: May 10, 2019Date of Patent: March 2, 2021Assignee: The MathWorks, Inc.Inventors: Kiran K. Kintali, Shomit Dutta, E. Mehran Mestchian, Pieter J. Mosterman
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Publication number: 20190332732Abstract: Systems and methods evaluate simulation models and measure floating point arithmetic errors in terms of Unit in Last Place (ULP). The simulation model may include model elements that perform numerical computations using Native Floating Point (NFP) arithmetic. The model elements may be arranged to implement a procedure. A data store may include local ULP errors predetermined for the model elements. The systems and methods may retrieve the local ULP errors for the model elements included in the model, and may apply a rules-based analysis to compute an overall ULP error of the simulation model. The systems and methods may present the overall ULP computed for the model. The systems and methods may also present intermediate ULP errors determined for portions of the simulation model. Changes may be made to the model to reduce the overall ULP error.Type: ApplicationFiled: May 10, 2019Publication date: October 31, 2019Inventors: Kiran K. Kintali, Shomit Dutta, E. Mehran Mestchian, Pieter J. Mosterman
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Publication number: 20190095303Abstract: Systems and methods evaluate simulation models and measure floating point arithmetic errors in terms of Unit in Last Place (ULP). The simulation model may include model elements that perform numerical computations using Native Floating Point (NFP) arithmetic. The model elements may be arranged to implement a procedure. A data store may include local ULP errors predetermined for the model elements. The systems and methods may retrieve the local ULP errors for the model elements included in the model, and may apply a rules-based analysis to compute an overall ULP error of the simulation model. The systems and methods may present the overall ULP computed for the model. The systems and methods may also present intermediate ULP errors determined for portions of the simulation model. Changes may be made to the model to reduce the overall ULP error.Type: ApplicationFiled: November 21, 2018Publication date: March 28, 2019Inventors: Kiran K. Kintali, Shomit Dutta, E. Mehran Mestchian, Pieter J. Mosterman
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Automatic replacement of a floating-point function to facilitate fixed-point program code generation
Patent number: 10168990Abstract: A device may receive a floating-point function. The floating-point function may be a function described in a programming language that uses floating-point representation. The device may determine that fixed-point program code, associated with the floating-point function, is to be generated. The device may determine that the floating-point function is to be replaced with a replacement construct before the fixed-point program code is generated. The replacement construct may be described in the programming language and may be capable of conversion from the floating-point representation to a fixed-point representation. The device may determine parameters associated with generating the replacement construct. The parameters may be determined based on an evaluation of the floating-point function. The device may generate the replacement construct based on the parameters. The device may replace the floating-point function with the replacement construct.Type: GrantFiled: January 17, 2014Date of Patent: January 1, 2019Assignee: The MathWorks, Inc.Inventors: Muthiah Annamalai, Kiran K. Kintali, Srinivas Muddana -
Patent number: 10140099Abstract: Systems and methods generate code from an executable model. The model may operate on variables having floating point data types. The systems and methods may unpack the sign, exponent, and mantissa components of the floating point variables, and interpret them as boolean, integer, or fixed-point data types. The systems and methods may include operators that operate on the extracted sign, exponent, and mantissa components, and that produce sign, exponent, and mantissa outputs having boolean, integer or fixed-point data types. The systems and methods may pack the sign, exponent, and mantissa components of the output into an integer and reinterpret the integer as a floating point data type. Having replaced the floating point data types with boolean, integer or fixed-point data types, the generated code may be suitable for programmable logic devices and/or microcontrollers that lack Floating Point Units (FPUs).Type: GrantFiled: January 4, 2017Date of Patent: November 27, 2018Assignee: The MathWorks, Inc.Inventors: Kiran K. Kintali, Shomit Dutta, Anand S. Krishnamoorthi, Ebrahim Mehran Mestchian
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Patent number: 10089089Abstract: A device may receive input code that includes one or more input objects. The input code may be used in connection with generation of output code. The output code, when generated, may include one or more output objects, corresponding to and different than the one or more input objects. The device may receive or determine conversion information identifying a conversion operation to perform to generate the one or more output objects based on the one or more input objects. The conversion information may be received separately from the input code. The device may generate, based on the conversion information and the input code, an intermediate representation. The intermediate representation may include one or more annotations corresponding to the one or more input objects and defining the conversion operation. The device may compile, based on the intermediate representation, the output code. The device may execute or provide the output code.Type: GrantFiled: June 1, 2016Date of Patent: October 2, 2018Assignee: The MathWorks, Inc.Inventors: Anand Krishnamoorthi, Kiran K. Kintali, Ebrahim Mehran Mestchian, Srinivas Muddana
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Publication number: 20170351493Abstract: Systems and methods generate code from an executable model. The model may operate on variables having floating point data types. The systems and methods may unpack the sign, exponent, and mantissa components of the floating point variables, and interpret them as boolean, integer, or fixed-point data types. The systems and methods may include operators that operate on the extracted sign, exponent, and mantissa components, and that produce sign, exponent, and mantissa outputs having boolean, integer or fixed-point data types. The systems and methods may pack the sign, exponent, and mantissa components of the output into an integer and reinterpret the integer as a floating point data type. Having replaced the floating point data types with boolean, integer or fixed-point data types, the generated code may be suitable for programmable logic devices and/or microcontrollers that lack Floating Point Units (FPUs).Type: ApplicationFiled: January 4, 2017Publication date: December 7, 2017Inventors: Kiran K. Kintali, Shomit Dutta, Anand S. Krishnamoorthi, Ebrahim Mehran Mestchian
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Publication number: 20160357534Abstract: A device may receive input code that includes one or more input objects. The input code may be used in connection with generation of output code. The output code, when generated, may include one or more output objects, corresponding to and different than the one or more input objects. The device may receive or determine conversion information identifying a conversion operation to perform to generate the one or more output objects based on the one or more input objects. The conversion information may be received separately from the input code. The device may generate, based on the conversion information and the input code, an intermediate representation. The intermediate representation may include one or more annotations corresponding to the one or more input objects and defining the conversion operation. The device may compile, based on the intermediate representation, the output code. The device may execute or provide the output code.Type: ApplicationFiled: June 1, 2016Publication date: December 8, 2016Inventors: Anand KRISHNAMOORTHI, Kiran K. Kintali, Ebrahim Mehran Mestchian, Srinivas Muddana
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Patent number: 9454627Abstract: Systems and methods optimize hardware description generated from a graphical model automatically. The system may include an optimizer. The optimizer may add a serializer component and a deserializer component to the model. The serializer component may receive parallel data and may produce serial data. The serializer may introduce one or more idle cycles into the serial data being produced. The deserializer component may receive serial data and may produce parallel data. The serializer and deserializer components may receive and generate control signals. The control signals may include a valid signal for indicating valid data elements of the serial and parallel data, and a start the start signal for indicating the beginning of a new frame or cycle when constructing parallel data from serial data.Type: GrantFiled: March 6, 2015Date of Patent: September 27, 2016Assignee: The MathWorks, Inc.Inventors: Girish Venkataramani, Kiran K. Kintali, Wei Zang, Wang Chen
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Patent number: 9292419Abstract: A device receives code for a technical computing environment, and receives conditions for executing the code. The device performs a static analysis of the code, based on the conditions, to generate static analysis information for the code, and executes the code in the technical computing environment based on the conditions. The device determines coverage information associated with the executing code, where the coverage information provides a measure of completeness associated with the executing code. The device compares the static analysis information and the coverage information to determine confidence information associated with the coverage information, and outputs or stores the coverage information and the confidence information.Type: GrantFiled: May 29, 2014Date of Patent: March 22, 2016Assignee: The MathWorks, Inc.Inventors: Kiran K. Kintali, Anand Krishnamoorthi, Ebrahim Mestchian, Richard M. McKeever
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Patent number: 9032380Abstract: A device receives program code, generated via a technical computing environment (TCE) and including code that requires further processing to execute, and identifies one or more function calls or one or more object method calls in the program code. The device creates a control flow graph, for the program code, based on the one or more function calls or the one or more object method calls. The device transforms the control flow graph into a data flow graph. The data flow graph includes a representation for each of the one or more function calls or the one or more object method calls. The device generates hardware code based on the data flow graph, the hardware code including code that does not require further processing to execute.Type: GrantFiled: December 4, 2012Date of Patent: May 12, 2015Assignee: The MathWorks, Inc.Inventors: Navaneetha K. Ruthramoorthy, Kiran K. Kintali