Abstract: An aspect of the present invention improves accuracy of output codes generated by a lower resolution ADC. In an embodiment, a gain factor is determined by examining a strength of an input signal in analog form. The gain factor equals one if the strength is more than half of the maximum voltage resolvable by the ADC and is more than one otherwise. An analog sample obtained from the input signal is converted to a digital code using the ADC, with the digital code being scaled up by the gain factor compared to an output code representing the strength of the analog sample in relation to the maximum voltage. The digital code is divided by the gain factor to generate the output code representing the strength of the analog sample in relation to the maximum voltage. The accuracy of the output code is greater for smaller amplitudes of the analog samples.

Abstract: When converting an analog signal to N-bit digital codes, high SNR (signal to noise ratio) by generating multiple N-bit codes from the same analog sample and averaging the N-bit codes. However, the entire N-bit code is determined only a single time, and only P-bit (P less than N) codes are generated. The P-bit codes may be averaged, and the N-bit code is corrected based on the average value to generate an accurate N-bit digital code. As P can be much less than N, the correction can be implemented in a few iterations, thereby enabling the ADCs to be implemented with a high throughput performance. Due to the correction, a high SNR may be attained as well.